extending a signal pulse

[Guy Eschemann]

You could use a SRL16/DFF (with clock-enable and synchronous clear)
combination for this. The input pulse - which is high for one clock
cycle -sets the FF output, and a delayed version of this pulse clears
it after a number of clock cycles. The depth of the SLR16 sets the
length of the output pulse. Note that the output pulse is delayed by
one clock cycle with respect to the input pulse.

_______
| |
+--| SRL16 |------+
| |_______| |
| |
| ______ |
| | | |
short pulse -----+--|CE Q|----------- long pulse
| | |
1--|D | |
| | |
CLK--|> | |
| | |
---|CLR | |
| |______| |
| |
+-----------------+

Regards,
Guy.

 

[Johan Bernspĺng]

Yes, that looks like a good solution. I'll give that a try later.


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Guy Eschemann wrote:

You could use a SRL16/DFF (with clock-enable and synchronous clear)
combination for this. The input pulse - which is high for one clock
cycle -sets the FF output, and a delayed version of this pulse clears
it after a number of clock cycles. The depth of the SLR16 sets the
length of the output pulse. Note that the output pulse is delayed by
one clock cycle with respect to the input pulse.

_______
| |
+--| SRL16 |------+
| |_______| |
| |
| ______ |
| | | |
short pulse -----+--|CE Q|----------- long pulse
| | |
1--|D | |
| | |
CLK--|> | |
| | |
---|CLR | |
| |______| |
| |
+-----------------+

Regards,
Guy.

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