expressions in `define

F

fpgabuilder

Guest
Why does the following macro always get 1 in my simulation?

`define ADC_FS 125 //MHz
`define ADC_TSER (1000/(7*`ADC_FS)) //ns

Later in one module I have -

parameter TSER = `ADC_TSER;

In the simulator I always see TSER = 1. I am using Modelsim DE. I
have also tried an entire range of simulator timescale and precision.
i.e. going from 1ps/1ps to 1ns/100ps. Additionally, it also causes
the simulator to exceed its iteration limit at following line of code
-

always #(TSER/2) clk = ~clk;

I again see this at all timscale settings. But I cannot understand
why it should do this at 1ns/1ps setting.

I appreciate your help.
Thanks.
Sanjay
 
On Feb 24, 10:14 pm, "Cary R." <no-s...@host.spam> wrote:
fpgabuilder wrote:
Why does the following macro always get 1 in my simulation?

Because you are doing integer division.

always #(TSER/2) clk = ~clk;

Same problem here!

Cary
Click to expand...
How do I do a fractional division?

Thx.
 
fpgabuilder wrote:
On Feb 25, 8:32 am, fpgabuilder <parekh...@gmail.com> wrote:
On Feb 24, 10:14 pm, "Cary R." <no-s...@host.spam> wrote:

fpgabuilder wrote:
Why does the following macro always get 1 in my simulation?
Because you are doing integer division.
always #(TSER/2) clk = ~clk;
Same problem here!
Cary
How do I do a fractional division?

Thx.

Looks like I have answered my question by rewriting the macro
expressions like this. Did not change the expression which uses the
parameter. But this seems like very simulator specific. Please let
me know if there is a more reliable way.

`define ADC_FS 125.000 //MHz
`define ADC_TSER (1000.000/(7.000*`ADC_FS)) //ns

//did not change this.
always #(TSER/2) clk = ~clk;
Click to expand...
It works because an arithmetic operator with real-value arguments
makes a real-value result. This is well defined and not a surprise.
These rules are written into the standard, and BTW this is how C/C++
works as well. So this is not simulator specific, this is the right
answer.


--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,
http://www.icarus.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep."
 
On Feb 25, 8:32 am, fpgabuilder <parekh...@gmail.com> wrote:
On Feb 24, 10:14 pm, "Cary R." <no-s...@host.spam> wrote:

fpgabuilder wrote:
Why does the following macro always get 1 in my simulation?

Because you are doing integer division.

always #(TSER/2) clk = ~clk;

Same problem here!

Cary

How do I do a fractional division?

Thx.
Click to expand...
Looks like I have answered my question by rewriting the macro
expressions like this. Did not change the expression which uses the
parameter. But this seems like very simulator specific. Please let
me know if there is a more reliable way.

`define ADC_FS 125.000 //MHz
`define ADC_TSER (1000.000/(7.000*`ADC_FS)) //ns

//did not change this.
always #(TSER/2) clk = ~clk;

Thx.
 
fpgabuilder wrote:
On Feb 25, 8:32 am, fpgabuilder <parekh...@gmail.com> wrote:
On Feb 24, 10:14 pm, "Cary R." <no-s...@host.spam> wrote:

fpgabuilder wrote:
Why does the following macro always get 1 in my simulation?
Because you are doing integer division.
always #(TSER/2) clk = ~clk;
Same problem here!
Cary
How do I do a fractional division?

Thx.

Looks like I have answered my question by rewriting the macro
expressions like this. Did not change the expression which uses the
parameter. But this seems like very simulator specific. Please let
me know if there is a more reliable way.

`define ADC_FS 125.000 //MHz
`define ADC_TSER (1000.000/(7.000*`ADC_FS)) //ns

//did not change this.
always #(TSER/2) clk = ~clk;

Thx.
Click to expand...
To get a real (fractional) result at least one of the terms must be a
real value, so

`define ADC_FS 125.0 //MHz
`define ADC_TSER (1000/(7*`ADC_FS)) //ns

should also work. I'm assuming the second case works with out change
since TSER is now a real value and hence real division is performed.

Cary
 
On Feb 25, 9:57 am, "Cary R." <no-s...@host.spam> wrote:
fpgabuilder wrote:
On Feb 25, 8:32 am, fpgabuilder <parekh...@gmail.com> wrote:
On Feb 24, 10:14 pm, "Cary R." <no-s...@host.spam> wrote:

fpgabuilder wrote:
Why does the following macro always get 1 in my simulation?
Because you are doing integer division.
always #(TSER/2) clk = ~clk;
Same problem here!
Cary
How do I do a fractional division?

Thx.

Looks like I have answered my question by rewriting the macro
expressions like this.  Did not change the expression which uses the
parameter.  But this seems like very simulator specific.  Please let
me know if there is a more reliable way.

`define ADC_FS 125.000 //MHz
`define ADC_TSER (1000.000/(7.000*`ADC_FS)) //ns

 //did not change this.
 always #(TSER/2) clk = ~clk;

Thx.

To get a real (fractional) result at least one of the terms must be a
real value, so

   `define ADC_FS 125.0 //MHz
   `define ADC_TSER (1000/(7*`ADC_FS)) //ns

should also work. I'm assuming the second case works with out change
since TSER is now a real value and hence real division is performed.

Cary
Click to expand...
Thanks guys.
 
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