Evaluating difference between real number and fixed point ap

[daniel.larkin@gmail.com]

All,

Within my verilog testbench I'd like to generate a signal which gives
the error between an arithmetic function using real numbers and an
approximation to the arithmetic function using a fixed point
representation resulting from the actual rtl.

i.e.

error = result_of_function_with_real_numbers_in_tb -
fixed_point_rtl_function_approximation;

My problem is that the arithmetic function uses e^x and I'm not aware
of a straightforward way of implementing this in the testbench using
Verilog/SystemVerilog. Consequently I considered generating the actual
real value offline using a C program and writing the result to a file
and then reading in this value into the tb. However it appears Verilog
(95 & 2001?) can only read hexadecimal or binary from a file (please
correct me if I'm wrong?). So it would seem to be necessary to write
the real value to file in its IEEE double/floating point binary format,
and afterwards do a fair bit of conversion before I could get it back
into a verilog real type.

The other option as I see it is to generate the error value completely
in software, and use shifted integers to capture the effects of the
precision loss due to the reduced wordlength of the fixed point
representation.

Whilst both options are achieveable, they seem overkill for what is
probably not an uncommon task.

Any suggestions or thoughts on the best approach would be most welcome

Regards
Daniel

 

[Steve Pope]

daniel.larkin@gmail.com <daniel.larkin@gmail.com> wrote:

Within my verilog testbench I'd like to generate a signal which gives
the error between an arithmetic function using real numbers and an
approximation to the arithmetic function using a fixed point
representation resulting from the actual rtl.

My problem is that the arithmetic function uses e^x and I'm not aware
of a straightforward way of implementing this in the testbench using
Verilog/SystemVerilog.

First, you need to ask yourself if this is really the only
time you'll be facing a similar situation in your project.
If not, consider the possibility that your project needs
to routinely use some suitable systems language (C, C++,
or Matlab for example) to make this sort of comparison, rather
than doing it always in Verilog.

That aside, you can make use of the identity

e^x = 2^(log2(e) * x)

Where log2(e) is a constant equal to approximately 1.4427.
This reduces your problem to performing a constant multiply
followed by computing a power of two, which can be further broken
into a leading-zero's counter to compute the integer part, and a
lookup table to compute the fractional part.

Good luck

Steve

 

[naren]

Hi Daniel,
My suggestion will be to dump the inputs to the function (during a
simulation) to a file and later process that in C for both the cases
(floating point / fixed point) and do the comparision. Hence the
comparision will not be done during simulation, rather it will be post
processed.
Thanks & Regards,
Naren.

TooMuch Semiconductor Solutions,
A Startup specialising in Verification solutions.

 

[daniel.larkin@gmail.com]

Thank you both for your considered responses. I quite like the idea
suggested by Naren to post-process the function outputs (I presume you
meant outputs rather than inputs). It will be quite straightforward
then to do the reconstruction and comparision against the double/float
value in software.

Point also taken about the bigger picture system modelling language.

Thanks again.
Daniel

 

[Jonathan Bromley]

<daniel.larkin@gmail.com> wrote:

I quite like the idea
suggested by Naren to post-process the function outputs (I presume you
meant outputs rather than inputs). It will be quite straightforward
then to do the reconstruction and comparision against the double/float
value in software.

Why not use the Verilog PLI, or SystemVerilog DPI (easier), to
call out to a function written in C?

I think you'll find Chris Spear's PLI page (chris.spear.net/pli)
has examples of PLI access to the C math library.

Much less hassle than post-processing.--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[daniel.larkin@gmail.com]

This sounds ideal - I hadn't considered it because I have no experence
using Verilog PLI (and my general perception that its an absolute
minefield - which is probably not the case for a constrained problem
like this)

Jonathan Bromley wrote:

daniel.larkin@gmail.com> wrote:

I quite like the idea
suggested by Naren to post-process the function outputs (I presume you
meant outputs rather than inputs). It will be quite straightforward
then to do the reconstruction and comparision against the double/float
value in software.

Why not use the Verilog PLI, or SystemVerilog DPI (easier), to
call out to a function written in C?

I think you'll find Chris Spear's PLI page (chris.spear.net/pli)
has examples of PLI access to the C math library.

Much less hassle than post-processing.--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

Is it possible to use a PLI to interface to the C function which
generates the actual real value?

Suhas

daniel.larkin@gmail.com wrote:

All,

Within my verilog testbench I'd like to generate a signal which gives
the error between an arithmetic function using real numbers and an
approximation to the arithmetic function using a fixed point
representation resulting from the actual rtl.

i.e.

error = result_of_function_with_real_numbers_in_tb -
fixed_point_rtl_function_approximation;

My problem is that the arithmetic function uses e^x and I'm not aware
of a straightforward way of implementing this in the testbench using
Verilog/SystemVerilog. Consequently I considered generating the actual
real value offline using a C program and writing the result to a file
and then reading in this value into the tb. However it appears Verilog
(95 & 2001?) can only read hexadecimal or binary from a file (please
correct me if I'm wrong?). So it would seem to be necessary to write
the real value to file in its IEEE double/floating point binary format,
and afterwards do a fair bit of conversion before I could get it back
into a verilog real type.

The other option as I see it is to generate the error value completely
in software, and use shifted integers to capture the effects of the
precision loss due to the reduced wordlength of the fixed point
representation.

Whilst both options are achieveable, they seem overkill for what is
probably not an uncommon task.

Any suggestions or thoughts on the best approach would be most welcome

Regards
Daniel

 

daniel.larkin@gmail.com wrote:

However it appears Verilog
(95 & 2001?) can only read hexadecimal or binary from a file (please
correct me if I'm wrong?).

Verilog-1995 can only read input using $readmem, which will only
accept hex or binary in a restricted format.

Verilog-2001 has extensions to allow opening files in read mode with
$fopen, and to do formatted reads with $fscanf. This allows reading
floating point values if desired.

Verilog-2005 has a $exp function, which could be used to compute
your e^x in Verilog. However, given all the language extensions added
in SystemVerilog, I don't expect implementors to get around to adding
this any time soon.