ESR homebrew revisit ? good design ?

[robb]

Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/


however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb

 

[DaveM]

"robb" <some@where.on.net> wrote in message
news:13mvtsa67vgo8c8@corp.supernews.com...

Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/


however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb

IC1-B is a "square wave" oscillator. Since there are no values on the drawing,
no way to determine the intended frequency and duty cycle of the oscillator.

--
Dave M
MasonDG44 at comcast dot net (Just substitute the appropriate characters in the
address)

"In theory, there isn't any difference between theory and practice. In
practice, there is." - Yogi Berra

 

[robb]

"DaveM" <masondg4499@comcast99.net> wrote in message
news:R9CdnfcFtaxPYPLanZ2dnUVZ_jCdnZ2d@comcast.com...

"robb" <some@where.on.net> wrote in message
news:13mvtsa67vgo8c8@corp.supernews.com...
I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/

however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function
being
fed through the test CAP or am i missing something ?


IC1-B is a "square wave" oscillator. Since there are no values
on the drawing,
no way to determine the intended frequency and duty cycle of
the oscillator.

Thanks DaveM,

Ah ..... of course the omnipotent (well versatile, as i am
learning) opamp.
I knew i must be missing something as someone said this schemat
is not too bad.

i only made it about three pages into the datasheet originally
but when i read your reply i went to page 19 there was an exmple
of using as an oscillator.

thanks Dave for the help,
robb

 

[ehsjr]

robb wrote:

Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/


however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb

Assuming I did the math right, IC1-b is producing ~ 95 kHz
into the bridge via TR1 & 2, which is about what is claimed
(100kHz) in the write up.

You can go here to see how the op-amp is configured
and the frequency computed:
http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/square.html#c1

The circuit works well, and is real easy on the wallet.

Ed

 

[robb]

"ehsjr" <ehsjr@bellatlantic.net> wrote in message
news:fBVbj.907$si6.581@trndny08...

robb wrote:
Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/


however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function
being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb



Assuming I did the math right, IC1-b is producing ~ 95 kHz
into the bridge via TR1 & 2, which is about what is claimed
(100kHz) in the write up.

You can go here to see how the op-amp is configured
and the frequency computed:

http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/square.html#c1

The circuit works well, and is real easy on the wallet.

Ed
Tanks Ed,

I am amateur occasional electronics hobbyist trying to learn
more.

i expect this to be quite easy on my wallet as i plan to use all
salvaged components,(because it makes it more interesting for me)
i have found all the components i need on a modem/hard drive
controller /video card boards now for the even more fun part....

thanks for help,
robb

 

[Terminal Crazy]

In article <13n0gknngs22159@corp.supernews.com>, robb <some@where.on.net>
wrote:

i expect this to be quite easy on my wallet as i plan to use all
salvaged components
recursive mode > How will you check the caopacitors then ? :-

Thanks to everyone for the interesting thread. I think i'll have a look a
building one just for fun.

Cheers

--
Mitch

terminal_crazy@sand-hill.freeserve.co.uk
www.sand-hill.freeserve.co.uk/terminal_crazy

 

[Jamie]

gearhead wrote:

On Dec 24, 10:17 am, "robb" <s...@where.on.net> wrote:

Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/

however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb


I know next to nothing about this, so I don't have an answer. I do
have a very simple question. At 100 kHz, wouldn't say a .1 uF cap
have high enough reactance to swamp the ESR? Seems like you'd need
megahertz, maybe even hundreds of megahertz, to be sure the resistive
component of a small ceramic cap's impedance would exceed its
capacitive component by order(s) of magnitude. But maybe then ESL
would interfere...
I'm just a babe in the woods guys, don't toast me.
when I was at semco (capacitor manufacturer), the lab instruments tested

1 pf using only 1 Mhz.


--
"I'd rather have a bottle in front of me than a frontal lobotomy"

http://webpages.charter.net/jamie_5"

 

[Jan Panteltje]

On a sunny day (Tue, 25 Dec 2007 10:19:46 -0800 (PST)) it happened gearhead
<nospam@billburg.com> wrote in
<24e9795e-2a3a-4aa1-bc66-98eb706ecb79@i12g2000prf.googlegroups.com>:

I know next to nothing about this, so I don't have an answer. I do
have a very simple question. At 100 kHz, wouldn't say a .1 uF cap
have high enough reactance to swamp the ESR? Seems like you'd need
megahertz, maybe even hundreds of megahertz, to be sure the resistive
component of a small ceramic cap's impedance would exceed its
capacitive component by order(s) of magnitude. But maybe then ESL
would interfere...
I'm just a babe in the woods guys, don't toast me.

It is not the frequency, it is the rise time of the square wave.
If the wave rises in 1 femto second, the frequency can still be 1 Hz only.
For a capacitor, to charge in a short time the formula
Q = C x U = i x t
shows that the voltage across the cap is U = (i x t) / C
For normal values of 'i' and very short 't', U will be close to zero.

A typical example:
1 uF, 1 us time, 1 mA, then after 1 uS the voltage across the cap will be:
U = 1 mA x 1 uS / 1 uF = 1 mV
U = .001 x .000001 / .000001 = .001 V

For a circuit like this:

Uin ----- C ------- out
|
R1
|
///

For an input voltage change like this:
________________________________________
|
|
|
|
_|

The voltage across the resistor will look like this:

peak = Uin
|\
| \
| \
| \
_| \_________________



If the capacitor has internal loss in th2 form of a resistance for example,
then there is a voltage divider, and the circuit looks like this:

U in ---R2 - C ------- out
|
R1
|
///

The peak output is now no longer Uin, but R1 / (R1 + R2) x Uin.


peak = Uin x R1 / (R1 + R2)
|\
| \
| \
_| \_________________

 

[Jan Panteltje]

On a sunny day (Tue, 25 Dec 2007 12:55:26 -0800 (PST)) it happened gearhead
<nospam@billburg.com> wrote in
<42af9874-14ca-4c47-b464-9056bead4a67@e10g2000prf.googlegroups.com>:

On Dec 25, 11:33 am, Jan Panteltje <pNaonStpealm...@yahoo.com> wrote:
On a sunny day (Tue, 25 Dec 2007 10:19:46 -0800 (PST)) it happened gearhea=
d
nos...@billburg.com> wrote in
24e9795e-2a3a-4aa1-bc66-98eb706ec...@i12g2000prf.googlegroups.com>:

I know next to nothing about this, so I don't have an answer.  I do
have a very simple question.  At 100 kHz, wouldn't say a .1 uF cap
have high enough reactance to swamp the ESR?  Seems like you'd need
megahertz, maybe even hundreds of megahertz, to be sure the resistive
component of a small ceramic cap's impedance would exceed its
capacitive component by order(s) of magnitude.  But maybe then ESL
would interfere...
I'm just a babe in the woods guys, don't toast me.

It is not the frequency, it is the rise time of the square wave.
If the wave rises in 1 femto second, the frequency can still be 1 Hz only.=

For a capacitor, to charge in a short time the formula
Q = C x U = i x t
shows that the voltage across the cap is U = (i x t) / C
For normal values of 'i' and very short 't', U will be close to zero.

A typical example:
1 uF, 1 us time, 1 mA, then after 1 uS the voltage across the cap will be:=

U = 1 mA x    1 uS /    1 uF = 1 mV
U = .001 x .000001 / .000001 = .001 V

For a circuit like this:

Uin ----- C ------- out
            |        
            R1
            |
           ///

For an input voltage change like this:
  ________________________________________
 |
 |
 |  
 |
_|

The voltage across the resistor will look like this:

   peak = Uin
 |\
 | \
 |  \
 |     \  
_|         \_________________

If the capacitor has internal loss in th2 form of a resistance for example=
,
then there is a voltage divider, and the circuit looks like this:

U in ---R2 - C ------- out
               |        
               R1
               |
              ///

The peak output is now no longer Uin, but R1 / (R1 + R2) x Uin.

   peak = Uin x R1 / (R1 + R2)
 |\
 |  \
 |      \  
_|           \_________________

Okay, the OP's circuit uses a voltage divider like you described
(actually some kind of bridge arrangement) and a peak hold.
It makes sense that you need a fast-rising edge, to keep delta V on
the cap low enough to maintain a linear relationship to C.

You mean to R?

But you
need so much speed to do this, that I wonder if the cap's inductance
will affect the measurement.

If the cap is inductive is is also defective
Some rolled foil caps, where the contact on the side of the foil gets lose,
can make inductors.
The circuit detects series 'impedance' in a sense.
In a good capacitor series impedance is close to zero.

 

[John]

"robb" <some@where.on.net> wrote in message
news:13mvtsa67vgo8c8@corp.supernews.com...

Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/


however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb

Hi, Robb -

I used SPICE to simulate the important parts of the circuit composed of the
bridge and IC1-C and IC1-D. I used a pulse generator rather than IC1-B. I
used voltage-controlled-voltage-sources rather than op-amp models. I looked
up an arbitrary capacitor's ESR for this simulation.

I got the following output "indications" vs capacitor (arbitrarily 100uF)
ESR:

ESR (ohms) Indication (percent)
0 100
..018 100 (specified value)
..18 99
1.8 92
18 52
180 7

A 10uF with 0 ESR also indicated 100%.

So, the circuit appears to work, but it depends on what you are expecting
from it as to how well it works. If you decide that anything below, say, 50%
is bad, you may not catch the capacitor that causes equipment to fail when
it has more than 1.8 to 18 ohms of ESR.

I think the amount of ESR that can be tolerated will depend on the target
equipment's sensitivity to ESR. In some cases, you may find that even 1.8
ohms causes malfunction. In other cases you may find that 1K ohms of ESR
causes no problems.

To verify the simulation, you could build the meter and test various
capacitors known to be new and good. Then add some series resistance to each
and record the readings. Then all you would need is experience to know when
equipment will fail due to high ESR.

Cheers,
John

 

[Jan Panteltje]

On a sunny day (Tue, 25 Dec 2007 22:11:21 -0800 (PST)) it happened gearhead
<nospam@billburg.com> wrote in
<234ed992-452a-4c80-91b1-48de975ea795@p69g2000hsa.googlegroups.com>:

All right, let me see if I get this.
For the purpose of understanding the circuit, the real capacitor under
test is modeled as a resistor in series with an ideal capacitor. By
design, the circuit measures series resistance Rs by using it to
unbalance a bridge. For this to work, the circuit has to see Rs as
having one end connected to the bridge and the other end connected to
ground. Thus series capacitance Cs has to be invisible to the
circuit. It has to look like a short.

Right, and it uses a peak detector approach, so the slowly decaying waveform
part is not used.

The circuit demands the capacitor look like a short by by having the
pulse so fast, and the charge taken on by the capacitor so
insignificant, that there is effectively no change in the capacitor's
voltage. Otherwise, it corrupts the measurement. That's what I meant
about the need for the "fast-rising edge."

OK, after posting the previous reply, it occured to me I could
have misunderstood the remark about inductive.
Indeed, if you used an almost infinite fast rising edge,
any inductance, even the capacitor leads, would be seen, and
a cap could be rated bad, while it actually was not.
In this circuit however, the pulse comes from the output of
an opamp oscillator, and those have reasonably slow rise times,
micro seconds rather then femto seconds, and so we do not have
to worry about very small inductances.

Is the circuit so fast that picofarad caps won't take on some small
voltage?

Indeed there is a useful range of capacitor values where it will work.
I think the ESR meter, in this case, is mainly used for electrolytic
capacitors, so maybe from 1uF up?

By "cap's inductance" I meant _parasitic_ inductance, and the
inductance in the cap itself may only be a small part of the total
parasitic inductance of leads, binding posts, wires connecting them to
the circuit board, and traces. Or even jumpers and alligator clips.
This is after all a hobbyist project.

Yes, I think we agree here.

 

[robb]

"Terminal Crazy" <Terminal_Crazy@sand-hill.freeserve.co.uk> wrote
in message
news:4f56a19769Terminal_Crazy@sand-hill.freeserve.co.uk...

In article <13n0gknngs22159@corp.supernews.com>, robb
some@where.on.net
wrote:
i expect this to be quite easy on my wallet as i plan to use
all
salvaged components

recursive mode > How will you check the caopacitors then ?
:-

haha..

i was planning use the Sam Goldwasser method with a function
generator and oscope which is also talked about in a Buchsbaum
book as well.

Thanks to everyone for the interesting thread. I think i'll
have a look a
building one just for fun.

very interresting to me as well.

robb

 

[robb]

"Jan Panteltje" <pNaonStpealmtje@yahoo.com> wrote in message
news:fkto9i$8mh$1@aioe.org...

On a sunny day (Tue, 25 Dec 2007 22:11:21 -0800 (PST)) it
happened gearhead
nospam@billburg.com> wrote in

234ed992-452a-4c80-91b1-48de975ea795@p69g2000hsa.googlegroups.co

m>:
Thanks Jamie, Jan and Gear,

thanks for the volley, i always seem to learn more when i read
the relative experts volleying an idea around.

robb

 

[robb]

"John" <see@my.sig> wrote in message
news:H2tcj.3474$nh7.2098@trnddc01...

"robb" <some@where.on.net> wrote in message
news:13mvtsa67vgo8c8@corp.supernews.com...
Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/
[trim]

Hi, Robb -

I used SPICE to simulate the important parts of the circuit
composed of the
bridge and IC1-C and IC1-D. I used a pulse generator rather
than IC1-B. I
used voltage-controlled-voltage-sources rather than op-amp
models. I looked
up an arbitrary capacitor's ESR for this simulation.

I got the following output "indications" vs capacitor
(arbitrarily 100uF)
ESR:

ESR (ohms) Indication (percent)
0 100
.018 100 (specified value)
.18 99
1.8 92
18 52
180 7

A 10uF with 0 ESR also indicated 100%.

So, the circuit appears to work, but it depends on what you are
expecting
from it as to how well it works. If you decide that anything
below, say, 50%
is bad, you may not catch the capacitor that causes equipment
to fail when
it has more than 1.8 to 18 ohms of ESR.

I think the amount of ESR that can be tolerated will depend on
the target
equipment's sensitivity to ESR. In some cases, you may find
that even 1.8
ohms causes malfunction. In other cases you may find that 1K
ohms of ESR
causes no problems.

To verify the simulation, you could build the meter and test
various
capacitors known to be new and good. Then add some series
resistance to each
and record the readings. Then all you would need is experience
to know when
equipment will fail due to high ESR.

Cheers,
John

Thanks for the info, help and effort John,

I would try something like a simulation if i did not already have
a hobby workbench overflowing with projects/ideas etc...

This ESR project fell out of another (in-complete) vintage
microcontroller project i was working on. That was put on hold
because the ever important ROM was fried and i am trying to
locate a source for a ROM image and in the meanwhile trying to
see if a could not engineer a new 8051 application to replace the
original ROM program.

hobbying really does eat up alot of time,
thanks again for your help and reply,
robb

 

[Jamie]

robb wrote:

Thanks to all for the ESR meter advice.

I had settled on building this *free* ESR meter schemat ...

http://www.qsl.net/iz7ath/web/02_brew/15_lab/06_esr/


however something troubled me about the schematic

Almost everyone alluded to ESR meters using some
pulse/wave/function passing through CAP to determine the ESR.

and this plan does not appear to have a pulse/wave/function being
fed through the test CAP or am i missing something ?

so is this ESR meter really an ok->good ESR plan ?

If it is not obvious i am looking for cheap (free) ESR
schematic/plans to build

thanks for any helpful replies,
robb

IC1-B is a square wave generator due to the hysteresis design with the
feed back to the (+) input. C3 makes up for the timing frequency used.

The circuit is using the raising edge of the square wave as the time
domain for acquiring readings. Initial raise will only be seen in the
IC1-D circuit due to the small size of C4. R7 will discharge it quickly.

In the bridge it self, if the Test cap has some (R) in it, R9,R9 will
not be at abs 0 volts. The offset is quickly reproduced and amplified
via the IC1-C. Because this is the starting of the square wave from the
generator, C4 will see a sharp raise in the signal and thus C4 being
small like it is, will produce a nice short pulse of the amplitude that
translates to an ohm reading via the IC1-D. After this initial starting
pulse, there will be a continuous reference as a ramp how ever, this will
have little effect.
A perfect cap with 0 ESR, should never allow the sharp raise of the
generate be seen at C4. All you should get is a 0 to 4.5 volt ramp at
best.
But in a cap that has some ESR, the starting ramp will not be at
0(R9+R10) and
this is where the IC1-C will amplify it greatly at the same time the
initial raising of the square wave. DS3 anc C6 will simply hold a
reference for you, between cycles.

I know that is long winded but I think at times it's needed.

--
"I'd rather have a bottle in front of me than a frontal lobotomy"

"Daily Thought:

SOME PEOPLE ARE LIKE SLINKIES. NOT REALLY GOOD FOR ANYTHING BUT
THEY BRING A SMILE TO YOUR FACE WHEN PUSHED DOWN THE STAIRS.
http://webpages.charter.net/jamie_5"