Error --unconstrained record or array type is not supported

[Zheyu.Gao@googlemail.com]

I was trying to compile the VHDL code with generic (Widthositive:=
8);

In Quartus, I got the following error.
Error (10427): VHDL aggregate error at GCD.vhd(49): OTHERS choice used
in aggregate for unconstrained record or array type is not supported

-----------------------------------------------------------------
library IEEE;
use IEEE.STD_Logic_1164.all, IEEE.Numeric_STD.all;
entity GCD is
generic (Widthositive:= 8); ---I have also tried natural and
integer, but all failed.
port (Clock,Reset,Load: in std_logic;
A,B: in unsigned(Width-1 downto 0);
Done: out std_logic;
Y: out unsigned(Width-1 downto 0));
end entity GCD;
architecture RTL of GCD is
signal A_New,A_Hold,B_Hold: unsigned(Width-1 downto 0);
signal A_lessthan_B: std_logic;
begin
----------------------------------------------------
-- Load 2 input registers and ensure B_Hold < A_Hold
---------------------------------------------------
LOAD_SWAP: process (Clock)
begin
if rising_edge(Clock) then
if (Reset = '0') then
A_Hold <= (others => '0');
B_Hold <= (others => '0');
elsif (Load = '1') then
A_Hold <= A;
B_Hold <= B;
elsif (A_lessthan_B = '1') then
A_Hold <= B_Hold;
B_Hold <= A_New;
else A_Hold <= A_New;
end if;
end if;
end process LOAD_SWAP;

SUBTRACT_TEST: process (A_Hold, B_Hold)
begin
-------------------------------------------------------
-- Subtract B_Hold from A_Hold if A_Hold >= B_Hold
------------------------------------------------------
if (A_Hold >= B_Hold) then
A_lessthan_B <= '0';
A_New <= A_Hold - B_Hold;
else
A_lessthan_B <= '1';
A_New <= A_Hold;
end if;
-------------------------------------------------
-- Greatest common divisor found if B_Hold = 0
-------------------------------------------------
if (B_Hold = (others => '0')) then -- here is the error B_Hold =
(others => '0')
Done <= '1';
Y <= A_Hold;
else
Done <= '0';
Y <= (others => '0');
end if;
end process SUBTRACT_TEST;
end architecture RTL;
-------------------------------------------------------------------------------
I also googled some topic about it, is it true that when using
generics, B_Hold = (others => '0') OTHERS choice used in aggregate for
unconstrained record or array type is not supported?

 

[Alan Fitch]

Zheyu.Gao@googlemail.com wrote:

I was trying to compile the VHDL code with generic (Widthositive:=
8);

In Quartus, I got the following error.
Error (10427): VHDL aggregate error at GCD.vhd(49): OTHERS choice used
in aggregate for unconstrained record or array type is not supported
snip

-----------------------------------------------------------------
library IEEE;
use IEEE.STD_Logic_1164.all, IEEE.Numeric_STD.all;
entity GCD is
generic (Widthositive:= 8); ---I have also tried natural and
integer, but all failed.
port (Clock,Reset,Load: in std_logic;
A,B: in unsigned(Width-1 downto 0);
Done: out std_logic;
Y: out unsigned(Width-1 downto 0));
end entity GCD;
architecture RTL of GCD is
signal A_New,A_Hold,B_Hold: unsigned(Width-1 downto 0);
signal A_lessthan_B: std_logic;
begin
snip

if (B_Hold = (others => '0')) then -- here is the error B_Hold =
(others => '0')
-------------------------------------------------------------------------------
I also googled some topic about it, is it true that when using
generics, B_Hold = (others => '0') OTHERS choice used in aggregate for
unconstrained record or array type is not supported?

Yes it's true. The expression (others => '0') doesn't hold enough type
information to make the compiler happy.

There are various ways round this:

1. use a subtype, e.g.

subtype vecT is unsigned (width -1 downto 0);

....
if B_hold = VecT'(others => '0')

2. The other way is to use the aggregate itself by naming the aggregate
choices, e.g.

if B_hold = (Width -1 downto 0 => '0') then

I haven't tried these in Quartus,

regards
Alan
--
Alan Fitch
Doulos
http://www.doulos.com

 

[Brian Drummond]

On Wed, 11 Mar 2009 19:03:50 -0700 (PDT), "Zheyu.Gao@googlemail.com"
<Zheyu.Gao@googlemail.com> wrote:

I was trying to compile the VHDL code with generic (Widthositive:=
8);

In Quartus, I got the following error.
Error (10427): VHDL aggregate error at GCD.vhd(49): OTHERS choice used
in aggregate for unconstrained record or array type is not supported

if (B_Hold = (others => '0')) then
-- here is the error

It is an error because you can overload "=" with an "=" operator which works on
different size operands (typically returning false if different size).
Therefore the parser cannot possibly know how many "others" there are.

The solution is to make the RHS operand explicitly the same size as the LHS
operand, whatever that size is.

One reliable way is simply
if (B_Hold = (B_Hold'range => '0')) then

- Brian

 

[JimLewis]

Zheyu....@googlemail.com wrote:
I was trying to compile the VHDL code with generic (Widthositive:> > 8);

In Quartus, I got the following error.
Error (10427): VHDL aggregate error at GCD.vhd(49): OTHERS choice used
in aggregate for unconstrained record or array type is not supported

snip

-----------------------------------------------------------------
library IEEE;
use IEEE.STD_Logic_1164.all, IEEE.Numeric_STD.all;
entity GCD is
generic (Widthositive:= 8); ---I have also tried natural and
integer, but all failed.
port (Clock,Reset,Load: in std_logic;
   A,B:   in unsigned(Width-1 downto 0);
   Done:  out std_logic;
   Y:     out unsigned(Width-1 downto 0));
end entity GCD;
architecture RTL of GCD is
   signal A_New,A_Hold,B_Hold: unsigned(Width-1 downto 0);
   signal A_lessthan_B: std_logic;
begin

snip

   if (B_Hold = (others => '0')) then  -- here is the error B_Hold > > (others => '0')
-------------------------------------------------------------------------------
I also googled some topic about it, is it true that when using
generics, B_Hold = (others => '0') OTHERS choice used in aggregate for
unconstrained record or array type is not supported?

Since B_hold is unsigned, you can take advantage of the overloading
and compare to an integer:

if B_hold = 0 then

Cheers,
Jim
SynthWorks VHDL Training
http://www.synthworks.com