Error Message when using process with wait-statement in test

[Vazquez]

Dear Sir or Madame,

when I try to compile a testbench including the following process
I get the following error message:
"Error: VHDL Wait Statement error at tb_reservoir_positions.vhd(55):
Wait Statement must contain condition clause with UNTIL keyword."


process
begin
t_reset <= '1', '0' after 100 ns;
wait;
end process;

I thought that is was a legal wait-statement when writing a testbench for functional
simulation.
So what could be the reason for that error message?
(p.s. I am using the Quartus II WebEdition 3.0)

Kind regards
Andrés Vázquez
G&D System Development

 

[Mike Treseler]

Vazquez wrote:

process
begin
t_reset <= '1', '0' after 100 ns;
wait;
end process;

I thought that is was a legal wait-statement when writing a testbench for functional
simulation.

The problem is that the wait is unconditional.
Even if the code were legal, you would never
get past the first loop of the process at 0 nS.

-- Mike Treseler

 

[Vazquez]

Hi,
so how can I write a process (within a testbench!) for a reset signal
which should be
asynchronous?

Best regards
Andrés Vázquez
G&D

Mike Treseler <mike.treseler@flukenetworks.com> wrote in message news:<3F9019AC.3010307@flukenetworks.com>...

Vazquez wrote:

process
begin
t_reset <= '1', '0' after 100 ns;
wait;
end process;

I thought that is was a legal wait-statement when writing a testbench for functional
simulation.

The problem is that the wait is unconditional.
Even if the code were legal, you would never
get past the first loop of the process at 0 nS.

-- Mike Treseler