ERROR:HDLCompilers:200 - ../../../src/iq_gen.v line 35 Targe

K

Kelvin @ SG

Guest
Hi, group:

What does this error mean? How may I fix it? I am using a Virtex-2 chip. And
i am mimicing the local
constant tricks the XAPP290 was doing, but somehow it doesn't work.

ERROR:HDLCompilers:200 - ../../../src/iq_gen.v line 35 Target of defparam
'lut_vdd.init' does not exist
ERROR:HDLCompilers:200 - ../../../src/iq_gen.v line 37 Target of defparam
'lut_gnd.init' does not exist

Best Regards,
Kelvin




In file ../../../src/iq_gen.v
wire vcc_iq, gnd_iq;

LUT1 lut_vdd( .O( gnd_iq ), .I0( vcc_iq ) );
defparam lut_vdd.init = 2'b00;
LUT1 lut_gnd( .O( vcc_iq ), .I0( gnd_iq ) );
defparam lut_gnd.init = 2'b11;
 
Thanks for any response...I fixed this error with "// synthesis attribute
INIT of lut_gnd is 00" to replace defparameter.

However, I don't understand why this INIT used a "8000"? How do I derive
this 8000?

Best Regards,
Kelvin


Solution 1:


For general information on how LUTs are initialized, please see the
information regarding LUTs in the Libraries Guide at:
http://support.xilinx.com/support/library.htm

Verilog Syntax:

module top (O, I0, I1, I2, I3);
input I0, I1, I2, I3;
output O;

LUT4 U1 (.O(O), .I0(I0), .I1(I1), .I2(I2), .I3(I3));
// synthesis attribute INIT of U1 is "8000"
endmodule






















"Kelvin @ SG" <kelvin8157@hotmail.com> wrote in message
news:btjnkq$ice$1@mawar.singnet.com.sg...
Hi, group:

What does this error mean? How may I fix it? I am using a Virtex-2 chip.
And
i am mimicing the local
constant tricks the XAPP290 was doing, but somehow it doesn't work.

ERROR:HDLCompilers:200 - ../../../src/iq_gen.v line 35 Target of defparam
'lut_vdd.init' does not exist
ERROR:HDLCompilers:200 - ../../../src/iq_gen.v line 37 Target of defparam
'lut_gnd.init' does not exist

Best Regards,
Kelvin




In file ../../../src/iq_gen.v
wire vcc_iq, gnd_iq;

LUT1 lut_vdd( .O( gnd_iq ), .I0( vcc_iq ) );
defparam lut_vdd.init = 2'b00;
LUT1 lut_gnd( .O( vcc_iq ), .I0( gnd_iq ) );
defparam lut_gnd.init = 2'b11;
Click to expand...
 
On Thu, 8 Jan 2004 23:44:16 +0800, "Kelvin @ SG" <kelvin8157@hotmail.com> wrote:
Thanks for any response...I fixed this error with "// synthesis attribute
INIT of lut_gnd is 00" to replace defparameter.

However, I don't understand why this INIT used a "8000"? How do I derive
this 8000?

Best Regards,
Kelvin

Verilog Syntax:

module top (O, I0, I1, I2, I3);
input I0, I1, I2, I3;
output O;

LUT4 U1 (.O(O), .I0(I0), .I1(I1), .I2(I2), .I3(I3));
// synthesis attribute INIT of U1 is "8000"
endmodule
Click to expand...
The LUT is a 16 bit memory. The "8000" is a 16 bit constant.

The 8000 is the initialization value for the 16 bit memory,

The MSB (the bit that makes it 8000 not 0000) of the memory
is addressed by I0, I1, I2, I3 having the value 1,1,1,1

I.E. this constant implements a 4 input AND gate.

The value FFFE implements a 4 input OR gate

There are 65536 possible init values, many are interesting.

http://www.fpga-faq.com/archives/23500.html#23505




===================
Philip Freidin
philip@fliptronics.com
Host for WWW.FPGA-FAQ.COM
 
Thank you Freidin!

By the way, what is the name of the PDF document from Xilinx which
explains how to use these Xilins-specific components, e.g. DCM, LUT, DLL,
etc?

I only know the simulation source codes from ***/src/unisims & src/simprims
can provide some limited information.

BesT Regards,
Kelvin







Philip Freidin <philip@fliptronics.com> wrote in message
news:e1kvvvsr6d7h5su60k9ieika662t6fgcot@4ax.com...
On Thu, 8 Jan 2004 23:44:16 +0800, "Kelvin @ SG" <kelvin8157@hotmail.com
wrote:
Thanks for any response...I fixed this error with "// synthesis attribute
INIT of lut_gnd is 00" to replace defparameter.

However, I don't understand why this INIT used a "8000"? How do I derive
this 8000?

Best Regards,
Kelvin

Verilog Syntax:

module top (O, I0, I1, I2, I3);
input I0, I1, I2, I3;
output O;

LUT4 U1 (.O(O), .I0(I0), .I1(I1), .I2(I2), .I3(I3));
// synthesis attribute INIT of U1 is "8000"
endmodule

The LUT is a 16 bit memory. The "8000" is a 16 bit constant.

The 8000 is the initialization value for the 16 bit memory,

The MSB (the bit that makes it 8000 not 0000) of the memory
is addressed by I0, I1, I2, I3 having the value 1,1,1,1

I.E. this constant implements a 4 input AND gate.

The value FFFE implements a 4 input OR gate

There are 65536 possible init values, many are interesting.

http://www.fpga-faq.com/archives/23500.html#23505




===================
Philip Freidin
philip@fliptronics.com
Host for WWW.FPGA-FAQ.COM
Click to expand...
 
On Tue, 13 Jan 2004 13:49:28 +0800, "Kelvin @ SG" <kelvin8157@hotmail.com> wrote:
Thank you Freidin!
Click to expand...
You can call me Philip.

By the way, what is the name of the PDF document from Xilinx which
explains how to use these Xilins-specific components, e.g. DCM, LUT, DLL,
etc?
Click to expand...
All the primitives are documented in the Libraries Guide. Get it from:

http://www.xilinx.com/support/sw_manuals/xilinx6/download/

You should also read the data sheet for the product you are using
as it will give a application view of the function, whereas the
the Libraries Guide is mor of a usage view. You should also look
at the application notes section for in-depth info.

http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=Application+Notes

I only know the simulation source codes from ***/src/unisims & src/simprims
can provide some limited information.
Click to expand...
The simulation models often can give you info that neither the data sheet
or libraries guide give you, BUT, the simulation models do not tell you how
the function is actually implemented. Sometimes the simulation models are
incorrect (not the basic stuff, but the really complex functions).

BesT Regards,
Kelvin
Click to expand...
Enjoy,
Philip




===================
Philip Freidin
philip@fliptronics.com
Host for WWW.FPGA-FAQ.COM
 
Thank you very much Philip. I am reading the Libraries Guide now.
I understand that the simulation model is not meant to synthesize. The
Libraries
Guide is the single biggest file in the documentation, so I missed it when I
download
the files.

Best Regards,
Kelvin






"Philip Freidin" <philip@fliptronics.com> wrote in message
news:7c87009bgg454q3qoft9olvrjcb61omfn7@4ax.com...
On Tue, 13 Jan 2004 13:49:28 +0800, "Kelvin @ SG" <kelvin8157@hotmail.com
wrote:
Thank you Freidin!

You can call me Philip.

By the way, what is the name of the PDF document from Xilinx which
explains how to use these Xilins-specific components, e.g. DCM, LUT, DLL,
etc?

All the primitives are documented in the Libraries Guide. Get it from:

http://www.xilinx.com/support/sw_manuals/xilinx6/download/

You should also read the data sheet for the product you are using
as it will give a application view of the function, whereas the
the Libraries Guide is mor of a usage view. You should also look
at the application notes section for in-depth info.


http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=Applicat
Click to expand...
ion+Notes
I only know the simulation source codes from ***/src/unisims &
src/simprims
can provide some limited information.

The simulation models often can give you info that neither the data
sheet
or libraries guide give you, BUT, the simulation models do not tell you
how
the function is actually implemented. Sometimes the simulation models are
incorrect (not the basic stuff, but the really complex functions).

BesT Regards,
Kelvin

Enjoy,
Philip




===================
Philip Freidin
philip@fliptronics.com
Host for WWW.FPGA-FAQ.COM
Click to expand...
 
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