B
btriffles
Guest
Hi,
I have a design (class project) that I will be submitting to a
fabrication company, MOSIS. MOSIS requires layouts to be submitted in
the CIF format. When attempting to export my design to a CIF file (in
the command window, File -> Export -> CIF), I receive the following
error message:
* Fatal * (poCifCreateCellInst) - Bad master name (ADCres) in cell
inst.
FATAL (285): Data translation unsuccessful.
*Fatal error occured* - Data translation unsuccessful.
Does anyone know what this error means or how I can track it down?
Here is some relevant information:
-The "ADCres" is a resistor used in the design. I have remade the
design with a completely new resistor, and the same error message
occurs with the new resistor's name.
-All components (and subcomponents) of the design pass DRC and LVS
checks with zero errors, and the post-layout simulation results are
correct.
-I have no problems exporting any other designs to a CIF file.
-The version of the exporter (PIPO) is as follows:
Virtuoso(R) CIF Writer, pipo.exe version 5.0.0 08/17/2004 08:38
(intelibm12) $, sub-version 5.0.33_USR3.16.35
If you need any more details about my design or environment, just let
me know.
Thanks for any help,
Bob
I have a design (class project) that I will be submitting to a
fabrication company, MOSIS. MOSIS requires layouts to be submitted in
the CIF format. When attempting to export my design to a CIF file (in
the command window, File -> Export -> CIF), I receive the following
error message:
* Fatal * (poCifCreateCellInst) - Bad master name (ADCres) in cell
inst.
FATAL (285): Data translation unsuccessful.
*Fatal error occured* - Data translation unsuccessful.
Does anyone know what this error means or how I can track it down?
Here is some relevant information:
-The "ADCres" is a resistor used in the design. I have remade the
design with a completely new resistor, and the same error message
occurs with the new resistor's name.
-All components (and subcomponents) of the design pass DRC and LVS
checks with zero errors, and the post-layout simulation results are
correct.
-I have no problems exporting any other designs to a CIF file.
-The version of the exporter (PIPO) is as follows:
Virtuoso(R) CIF Writer, pipo.exe version 5.0.0 08/17/2004 08:38
(intelibm12) $, sub-version 5.0.33_USR3.16.35
If you need any more details about my design or environment, just let
me know.
Thanks for any help,
Bob