V
Vignesh
Guest
I have an error when I try to generate the netlsit from a schematic
using NCVerilog
"Unable to determine switch master for instance 'I0' ni cell 'AND2X1'.
Examine your
switch view list and design/reference libraries to ensure that this
instance is
bound to a master view and netlist again"
I'm using AMI 0.5um library, IC6.1.1.64. I have the above error for
every symbol
I used from the library.
I have the CDS_Netlisting_Mode variable set to 'Analog'. What could be
the possible reason/solution.?
Thanks!!!
using NCVerilog
"Unable to determine switch master for instance 'I0' ni cell 'AND2X1'.
Examine your
switch view list and design/reference libraries to ensure that this
instance is
bound to a master view and netlist again"
I'm using AMI 0.5um library, IC6.1.1.64. I have the above error for
every symbol
I used from the library.
I have the CDS_Netlisting_Mode variable set to 'Analog'. What could be
the possible reason/solution.?
Thanks!!!