Equation to calculate logic required for multipliers

[spanchag]

Hi everybody,

Is there an equation where the inputs are the widths of the multiplier
and the multiplicand which computes the amount of logic (LUTs)
required for the operation.

Is there a way to compute the amount of logic required when the
desired width of the output is less than the width computed ?

It is FPGA architecture dependant but is there some equation which
gives a rough estimate ?

Thanks,