EPP Data Write Cycle

R

Rodrigo Ribeiro

Guest
Hello, I'm trying to implement this protocol in VHDL, if someone could
help me it would be great.
http://www.beyondlogic.org/epp/eppdatwr.gif


Code I'm using:

package datatypes is
subtype pixel_value is integer range 0 to 255;
subtype addr_value is integer range 0 to 8191; -- [12..0] linhas
endereço
--subtype addr_value is integer range 0 to 131071; -- [16..0] linhas
endereço

-- maquina de estados
type rec_machine is (startcomm, idle, waitdata, receiveok ); --
maquina p/ receber bytes
end datatypes;

use work.datatypes.all;
library ieee;
use ieee.std_logic_1164.all;

entity interface_paralela is

port (
-- ENTRADAS
write: in std_logic;
data_strobe: in std_logic;
addr_strobe: in std_logic;
reset: in std_logic;

-- DADOS
data: inout pixel_value;

-- SAIDAS
interrupt: out std_logic;
pwait: out std_logic;

-- CONTROLADOR MEMORIA
address: out addr_value;
wren: out std_logic

);

end interface_paralela;


architecture epp_mode of interface_paralela is
signal present_state, next_state: rec_machine;
signal status : NATURAL RANGE 0 TO 15;

begin

-- DEFAULTS;
interrupt <= '0';

maquina_estados: process(write, data_strobe, addr_strobe, reset) is
begin
IF reset='1' THEN
present_state <= startcomm;
ELSIF present_state=startcomm AND write='0' AND data_strobe='1' AND
addr_strobe='1' THEN
present_state <= idle;
ELSIF present_state=idle AND write='0' AND data_strobe='0' AND
addr_strobe='1' THEN
present_state <= waitdata;
ELSIF present_state<=waitdata AND write='0' AND data_strobe='1' AND
addr_strobe='1' THEN
present_state<=receiveok;
ELSIF present_state=receiveok AND write='1' AND data_strobe='1' AND
addr_strobe='1' THEN
present_state<=idle;
END IF;
end process maquina_estados;

control: process(present_state) is
VARIABLE addr_ptr : addr_value;
begin

CASE present_state IS

WHEN startcomm =>
addr_ptr := 0;
WHEN idle =>
wren <='0';
pwait <='0';
WHEN waitdata =>
wren <='1';
pwait <='1';
WHEN receiveok =>
wren <='0';
pwait <='0';
addr_ptr := addr_ptr+1;

END CASE;

end process control;

end epp_mode;
 

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