enum_encoding

[krby_xtrm]

-- Consider: --
signal a : std_logic(1 downt 0);

type states is (s0, s1, s2);
attribute enum_encoding: STRING;
attribute enum_encoding of states: type is "000 010 011";
signal state : states;

later i will assign state based on signal a:

state <= '1' & a(1) & a(0);

how do i do that since the line above doesn't work?

 

[Charles, SAG]

Hi,

the easiest thing to is probably to write a conversion function
something along the lines of the following:

function f_slv_to_states (v : std_logic_vector) return states;

function f_slv_to_states (v : std_logic_vector) return states is
variable v_int : integer;
begin
v_int := to_integer(unsigned(v));
case v_int is
when 0 =>
return s0;
when 2 =>
return s1;
when 3 =>
return s2;
when others =>
return s0;
end case;
end;

and then

state <= f_slv_to_states('1' & a(0) & a(1));

Hope this helps,
Charles

 

[Mike Treseler]

krby_xtrm wrote:

-- Consider: --
signal a : std_logic(1 downt 0);

type states is (s0, s1, s2);
attribute enum_encoding: STRING;
attribute enum_encoding of states: type is "000 010 011";

I prefer to leave the encoding set to auto
and get on with the description:

main : process (clock, reset) is
type RxState_t is (
IDLE,
START,
RECEIVE,
STOP,
FULL,
ERR
);
variable RxState_v : RxState_t;
procedure rx_state is -- Receive State Registers
begin
case RxState_v is
when IDLE => -- wait for start bit
-- ...

-- Mike Treseler