Edge-Triggered S-R Flip-Flop

J

Jim Thompson

Guest
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Wed, 10 Sep 2003 18:27:12 -0700, Jim Thompson <Jim-T@golana-will-get-you.com>
wroth:

ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson
Click to expand...
I thought they all worked like that.

Unless you mean that the DC level on either input is arbitrary. In that
case maybe you can program a PIC to do the job. :cool:

Jim "the other one"
 
On Thu, 11 Sep 2003 01:37:03 GMT, James Meyer
<james.meyer22@verizon.net> wrote:

On Wed, 10 Sep 2003 18:27:12 -0700, Jim Thompson <Jim-T@golana-will-get-you.com
wroth:

ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson

I thought they all worked like that.

Unless you mean that the DC level on either input is arbitrary. In that
case maybe you can program a PIC to do the job. :cool:

Jim "the other one"
Click to expand...
What's a PIC? Ah, yes, what Picadores use ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson
Click to expand...
I'd use a gate-delay "differientiator" on each input of an S-R flop.
You can also do some interesting things with a two-bit Johnson Counter
with separate edge clocked inputs for S and R. Decode the output
states with an xor gate.
mike

--
Bunch of stuff For Sale and Wanted at the link below.
laptops and parts Test Equipment
4in/400Wout ham linear amp.
Honda CB-125S
400cc Dirt Bike 2003 miles $550
Police Scanner, Color LCD overhead projector
Tek 2465 $800, ham radio, 30pS pulser
Tektronix Concept Books, spot welding head...
http://www.geocities.com/SiliconValley/Monitor/4710/
 
On Wed, 10 Sep 2003 19:05:55 -0700, mike <spamme0@juno.com> wrote:

Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson

I'd use a gate-delay "differientiator" on each input of an S-R flop.
You can also do some interesting things with a two-bit Johnson Counter
with separate edge clocked inputs for S and R. Decode the output
states with an xor gate.
mike
Click to expand...
I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
In article <rgmvlvgfg45o5v8fftj1cnvsvn3aiqk74a@4ax.com>, Jim-
T@golana-will-get-you.com says...
On Wed, 10 Sep 2003 19:05:55 -0700, mike <spamme0@juno.com> wrote:

Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson

I'd use a gate-delay "differientiator" on each input of an S-R flop.
You can also do some interesting things with a two-bit Johnson Counter
with separate edge clocked inputs for S and R. Decode the output
states with an xor gate.
mike

I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)
Click to expand...
Does it get rid of metastability too? ;-)

--
Keith
 
On Wed, 10 Sep 2003 23:02:56 -0400, Keith R. Williams
<krw@attglobal.net> wrote:

In article <rgmvlvgfg45o5v8fftj1cnvsvn3aiqk74a@4ax.com>, Jim-
T@golana-will-get-you.com says...
On Wed, 10 Sep 2003 19:05:55 -0700, mike <spamme0@juno.com> wrote:

Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson

I'd use a gate-delay "differientiator" on each input of an S-R flop.
You can also do some interesting things with a two-bit Johnson Counter
with separate edge clocked inputs for S and R. Decode the output
states with an xor gate.
mike

I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)

Does it get rid of metastability too? ;-)
Click to expand...
Does anything ?:)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!
Click to expand...
With 2 flip flops, or with 8 NAND gates. Replace them with NORs and
swap the outputs for negative edge trigger.

OUT
|
|
+-------|--------------------------+
| | |
| | +-------------+ |
| | | | |
^ | | | ^ | |
| *********** | | | *********** |
| * R * | | | * R * |
+---*D Q*--+ | +---*D Q*--+
* * | * *
* _* | * _*
+---*CLK Q*O------+ +---*CLK Q*O
| * * | * *
| *********** | ***********
| |
| |
| |
SET RESET


I traced the circuit below with 4 possible initial states.

below: Q(initially) = 0 RESET = 0


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \6 +--| | /7x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /5 | |
|NAND>-----+ |
\4 +-------| +--| Q
| |NAND>--+------- /3
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- \4
/3 +-------| +--|
|NAND>--+ \4x |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+--+ |
+-------| +--| |
=0 | |NAND>--+ =1
RESET -----+------------------------|


below: Q(initially) = 0 RESET = 1


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \6 +--| | /7x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /5 | |
|NAND>-----+ |
\4 +-------| +--| Q
| |NAND>--+------- /3
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- \4
/3 +-------| +--|
|NAND>--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND>-----+--+ |
+-------| +--| |
=1 | |NAND>--+ =1
RESET -----+------------------------|


below: Q(initially) = 1 RESET = 0


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \2 +--| | /3x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+ |
=0 +-------| +--| Q
| |NAND>--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- =0
=1 +-------| +--|
|NAND>--+ =0 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+--+ |
+-------| +--| |
=0 | |NAND>--+ =1
RESET -----+------------------------|


below: Q(initially) = 1 RESET = 1


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \2 +--| | /3x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+ |
=0 +-------| +--| Q
| |NAND>--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- =0
=1 +-------| +--|
|NAND>--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND>-----+--+ |
+-------| +--| |
=1 | |NAND>--+ =1
RESET -----+------------------------|
 
On Thu, 11 Sep 2003 07:30:26 GMT, "Tom Del Rosso"
<tdnews01@att.net.invalid> wrote:

Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

With 2 flip flops, or with 8 NAND gates. Replace them with NORs and
swap the outputs for negative edge trigger.

OUT
|
|
+-------|--------------------------+
| | |
| | +-------------+ |
| | | | |
^ | | | ^ | |
| *********** | | | *********** |
| * R * | | | * R * |
+---*D Q*--+ | +---*D Q*--+
* * | * *
* _* | * _*
+---*CLK Q*O------+ +---*CLK Q*O
| * * | * *
| *********** | ***********
| |
| |
| |
SET RESET
Click to expand...
Thanks, Tom! It's all coming back to me now.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Tom Del Rosso wrote:
Jim Thompson wrote:

ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!


With 2 flip flops, or with 8 NAND gates. Replace them with NORs and
swap the outputs for negative edge trigger.

OUT
|
|
+-------|--------------------------+
| | |
| | +-------------+ |
| | | | |
^ | | | ^ | |
| *********** | | | *********** |
| * R * | | | * R * |
+---*D Q*--+ | +---*D Q*--+
* * | * *
* _* | * _*
+---*CLK Q*O------+ +---*CLK Q*O
| * * | * *
| *********** | ***********
| |
| |
| |
SET RESET
Click to expand...

I don't think you want to do that with flip-flops. Too many
race issues with clocking and resetting at the same time.
If you rewire the flops into a Johnson counter configuration,
each flip-flop has to contend only with it's own metastability
issues. One clock makes the outputs the same, the other
makes 'em different. Decode the state with an XOR.

The stuff below looks a lot like a MC4044 Phase Detector.
mike

I traced the circuit below with 4 possible initial states.

below: Q(initially) = 0 RESET = 0


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \6 +--| | /7x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /5 | |
|NAND>-----+ |
\4 +-------| +--| Q
| |NAND>--+------- /3
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- \4
/3 +-------| +--|
|NAND>--+ \4x |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+--+ |
+-------| +--| |
=0 | |NAND>--+ =1
RESET -----+------------------------|


below: Q(initially) = 0 RESET = 1


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \6 +--| | /7x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /5 | |
|NAND>-----+ |
\4 +-------| +--| Q
| |NAND>--+------- /3
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- \4
/3 +-------| +--|
|NAND>--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND>-----+--+ |
+-------| +--| |
=1 | |NAND>--+ =1
RESET -----+------------------------|


below: Q(initially) = 1 RESET = 0


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \2 +--| | /3x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+ |
=0 +-------| +--| Q
| |NAND>--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- =0
=1 +-------| +--|
|NAND>--+ =0 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+--+ |
+-------| +--| |
=0 | |NAND>--+ =1
RESET -----+------------------------|


below: Q(initially) = 1 RESET = 1


/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \2 +--| | /3x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+ |
=0 +-------| +--| Q
| |NAND>--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- =0
=1 +-------| +--|
|NAND>--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND>-----+--+ |
+-------| +--| |
=1 | |NAND>--+ =1
RESET -----+------------------------|
Click to expand...


--
Bunch of stuff For Sale and Wanted at the link below.
laptops and parts Test Equipment
4in/400Wout ham linear amp.
Honda CB-125S
400cc Dirt Bike 2003 miles $550
Police Scanner, Color LCD overhead projector
Tek 2465 $800, ham radio, 30pS pulser
Tektronix Concept Books, spot welding head...
http://www.geocities.com/SiliconValley/Monitor/4710/
 
In article <3F60A336.4030407@juno.com>, spamme0@juno.com says...
Tom Del Rosso wrote:
Jim Thompson wrote:

ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!


With 2 flip flops, or with 8 NAND gates. Replace them with NORs and
swap the outputs for negative edge trigger.

OUT
|
|
+-------|--------------------------+
| | |
| | +-------------+ |
| | | | |
^ | | | ^ | |
| *********** | | | *********** |
| * R * | | | * R * |
+---*D Q*--+ | +---*D Q*--+
* * | * *
* _* | * _*
+---*CLK Q*O------+ +---*CLK Q*O
| * * | * *
| *********** | ***********
| |
| |
| |
SET RESET


I don't think you want to do that with flip-flops. Too many
race issues with clocking and resetting at the same time.
If you rewire the flops into a Johnson counter configuration,
each flip-flop has to contend only with it's own metastability
issues. One clock makes the outputs the same, the other
makes 'em different. Decode the state with an XOR.
Click to expand...
Hadn't thought of that! It's a much cleaner solution and purely
synchronous. Something like:

+---------------------------+ __
| +----------------|---------|<>|
| | | | |-----o Out
| | +---------|__|
| .---. | .---. |
+---|D |--+ +------|D |--+
| | | | |
R o------------->Ck |o----+ +--->Ck |o
'---' | '---'
|
S o--------------------------+

--
Keith
 
On Wed, 10 Sep 2003 23:02:56 -0400, Keith R. Williams <krw@attglobal.net> wroth:

In article <rgmvlvgfg45o5v8fftj1cnvsvn3aiqk74a@4ax.com>, Jim-T@golana-will-get-you.com says...

I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)

Does it get rid of metastability too? ;-)
Click to expand...
I find that the more I drink, the stabler I get. Sometimes I get so
stable I can hardly stand up.

Jim (Burp) Meyer
 
In article <99tvlvongilpvcrb2odpnb1qnpu44jsn5a@4ax.com>, Jim-
T@golana-will-get-you.com says...
On Wed, 10 Sep 2003 23:02:56 -0400, Keith R. Williams
krw@attglobal.net> wrote:

In article <rgmvlvgfg45o5v8fftj1cnvsvn3aiqk74a@4ax.com>, Jim-
T@golana-will-get-you.com says...
On Wed, 10 Sep 2003 19:05:55 -0700, mike <spamme0@juno.com> wrote:

Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

...Jim Thompson

I'd use a gate-delay "differientiator" on each input of an S-R flop.
You can also do some interesting things with a two-bit Johnson Counter
with separate edge clocked inputs for S and R. Decode the output
states with an xor gate.
mike

I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)

Does it get rid of metastability too? ;-)

Does anything ?:)
Click to expand...
Well, as long as you're inventing, I thought you'd go for
something useful! ;-)

--
Keith
 
In article <cf32mvg03t207se8iftt0nst3ghj52d3uf@4ax.com>,
james.meyer22@verizon.net says...
On Wed, 10 Sep 2003 23:02:56 -0400, Keith R. Williams <krw@attglobal.net> wroth:

In article <rgmvlvgfg45o5v8fftj1cnvsvn3aiqk74a@4ax.com>, Jim-T@golana-will-get-you.com says...

I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)

Does it get rid of metastability too? ;-)

I find that the more I drink, the stabler I get. Sometimes I get so
stable I can hardly stand up.
Click to expand...
Sometimes I'm (meta) stable on the bar stool. I could fall into
the potential well on the right, or the left (both stable
conditions). ...but I'm (meta) stable sitting on the local
maximum inbetween.

--
Keith
 
On Thu, 11 Sep 2003 13:24:58 -0400, Keith R. Williams
<krw@attglobal.net> wrote:

In article <3F60A336.4030407@juno.com>, spamme0@juno.com says...
Tom Del Rosso wrote:
Jim Thompson wrote:

ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.

I should keep notes... I can't remember how it was done.

Anyone still have a copy?

Thanks!

This will also work in many cases,
Click to expand...
It eliminates loss of state when both inputs go LOW.
(Use NOR if required)

Stepan

+-------| |-------|
|NAND>--+-----+ |NAND>--+-----
+--| | +--| |
| | | |
+----------|--+ +----------|--+
| | | |
+----------+ | +----------+ |
| | | |
+--| =0 | +--| =0 |
|NAND>-----+--+ |NAND>-----+--
+-------| |-------|
 
mike wrote:
I don't think you want to do that with flip-flops. Too many
race issues with clocking and resetting at the same time.
If you rewire the flops into a Johnson counter configuration,
each flip-flop has to contend only with it's own metastability
issues. One clock makes the outputs the same, the other
makes 'em different. Decode the state with an XOR.
Click to expand...
That's very neat.

The stuff below looks a lot like a MC4044 Phase Detector.
Click to expand...
It looks similar, although I derived it. Robert came up with the same
circuit in response to the same problem.
 
Jim Thompson wrote:
I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)
Click to expand...
Where is that Jim?
 
Jim Thompson wrote:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.
Click to expand...
This is identical to a version of JK-FF phase detector specialized for
PLL application and used in the 74HC297 ADPLL manu'd by TI still. You
might take a look at the gate level for that. The J and K inputs are
edge clocked and set/reset the FF.
 
On Fri, 12 Sep 2003 13:20:35 GMT, "Tom Del Rosso"
<tdnews01@att.net.invalid> wrote:

Jim Thompson wrote:

I just invented a method that avoids the "delay-game"... I'll post it
tomorrow... it's time now for Cab/Merlot blend and a filet ;-)

Where is that Jim?
Click to expand...
RSN!

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Fri, 12 Sep 2003 13:20:35 GMT, "Tom Del Rosso"
<tdnews01@att.net.invalid> wrote:

mike wrote:

I don't think you want to do that with flip-flops. Too many
race issues with clocking and resetting at the same time.
If you rewire the flops into a Johnson counter configuration,
each flip-flop has to contend only with it's own metastability
issues. One clock makes the outputs the same, the other
makes 'em different. Decode the state with an XOR.

That's very neat.

The stuff below looks a lot like a MC4044 Phase Detector.

It looks similar, although I derived it. Robert came up with the same
circuit in response to the same problem.
Click to expand...
Ah, yes! MC4044, I remember it well... I described what an ideal
edge-matching phase detector would do and Ron Treadway conceived the
logic... first day was 360 gates, second day was 90, and on the third
day it was NINE! Then I designed and coined the phrase "charge-pump".

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top