edge matching

[rohitbisht]

Hello

1. I'am a beginner in fpga.and want some help.
I'am trying to write code for matching rising edges of two different puls
train signa,so that AND operation can be performed b/w them
synchronization is must for carrying the AND operation.Kindly suggest som
idea.

2.how is it possible to generate signals at every rising egde of a give
signal where the frequency of new signal is defined by the taking (presen
and just previous rising egde)for frequency calculation and new signal wil
be generated at this present rising edge of given signal '

seeking your valuable ideas.

thanks in advance.

regards



---------------------------------------
Posted through http://www.FPGARelated.com

 

[fpgasm]

First of all, experts recomend double-flopping the inputs to avoid
metastability.

If you look at implementations of asynchronous protocols - say RS232 -
you will see that generally you need to oversample. With a clock 16
times maximum baud rate, RS232 circuits have a good chance of catching
transitions and being able to sync up.

If you have multiple sources, you can run a fast clock and flop in the
signals, then compare them at some later time.

rohitbisht wrote:

Hello

1. I'am a beginner in fpga.and want some help.
I'am trying to write code for matching rising edges of two different pulse
train signa,so that AND operation can be performed b/w them .
synchronization is must for carrying the AND operation.Kindly suggest some
idea.

2.how is it possible to generate signals at every rising egde of a given
signal where the frequency of new signal is defined by the taking (present
and just previous rising egde)for frequency calculation and new signal will
be generated at this present rising edge of given signal '

seeking your valuable ideas.

thanks in advance.

regards



---------------------------------------
Posted through http://www.FPGARelated.com

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