R
Ronen G
Guest
Hi all,
I'm looking for a reference design for Error Correction Code (ECC) (Single
Error Corection, Double Error Detction).
I need it for protecting a high speed interface to extenal SDRAM / DDRAM.
a link which describes the algorithm will help too.
thanks in advanced
Ronen
I'm looking for a reference design for Error Correction Code (ECC) (Single
Error Corection, Double Error Detction).
I need it for protecting a high speed interface to extenal SDRAM / DDRAM.
a link which describes the algorithm will help too.
thanks in advanced
Ronen