T
Tom Derham
Guest
(x-posted from comp.arch.fpga because i think this is on-topic for both
groups)
I am using 3 Xilinx SpartanIIE boards, each loaded with a similar design
running with a 100MHz master clock. This clock is derived from a single
source and distributed to each board so they are synchronised. The boards
are postioned about 50m apart.
I need to synchronise events on the boards, but occasionally sending a
single pulse (say 10ns long) from the output pin of one of the FPGAs to the
other boards, to allow them to synchronise internal timers. I need to make
sure that the pulse arrives at the other two boards at the same time so that
it is 'recognised' on the same rising edge of the reference clock in each
case, so that the boards synchronise together.
Clearly the attenuation of any 50m length of cable is such that I cannot
connect them directly, but nor do I want the complexity of converting the
pulse to optical fibre and back again.
For the distribution of the reference clock I am using National CLC005/012
driver and equaliser chipset over UTP, using equal length wires so as to not
introduce propagation skew. For practical reasons I can't use the same
cable for sending this event pulse, and ideally would like a simple, elegant
solution.
I was just wondering if anyone had done anything similar before... if not, I
have a back-up plan using more of the National drivers, but I thought they
might be a sledgehammer to crack a nut - and am unsure what levels of skew
they may introduce themselves... jitter is not so important because the
event is resynced at the receiving fpga, as long as the total difference in
edge is less than half of the reference clock cycle (so 5ns).
Thank you in advance for any ideas....
groups)
I am using 3 Xilinx SpartanIIE boards, each loaded with a similar design
running with a 100MHz master clock. This clock is derived from a single
source and distributed to each board so they are synchronised. The boards
are postioned about 50m apart.
I need to synchronise events on the boards, but occasionally sending a
single pulse (say 10ns long) from the output pin of one of the FPGAs to the
other boards, to allow them to synchronise internal timers. I need to make
sure that the pulse arrives at the other two boards at the same time so that
it is 'recognised' on the same rising edge of the reference clock in each
case, so that the boards synchronise together.
Clearly the attenuation of any 50m length of cable is such that I cannot
connect them directly, but nor do I want the complexity of converting the
pulse to optical fibre and back again.
For the distribution of the reference clock I am using National CLC005/012
driver and equaliser chipset over UTP, using equal length wires so as to not
introduce propagation skew. For practical reasons I can't use the same
cable for sending this event pulse, and ideally would like a simple, elegant
solution.
I was just wondering if anyone had done anything similar before... if not, I
have a back-up plan using more of the National drivers, but I thought they
might be a sledgehammer to crack a nut - and am unsure what levels of skew
they may introduce themselves... jitter is not so important because the
event is resynced at the receiving fpga, as long as the total difference in
edge is less than half of the reference clock cycle (so 5ns).
Thank you in advance for any ideas....