doubt in VHDL

[Viswan]

hi,

I have a doubt in VHDL. How could I convert a two's complement vector
to an unsigned vector and vice versa. I was designing a divider which
works only for unsigned vectors, where as all the rest of my hardware
deals with 2's complement numbers. So I planned to convert the 2's
complement vector to unsigned and get the result and convert it back
to 2's complement. Are there any other functions in VHDL that do
these kind of conversions? I know there are conversion from integers
to vectors but I doubt whether there are any conversion functions that
perform the above function.

Any other ideas on designing the above divider are also mostly
welcome.

Thanks
Viswan

 

[Symon]

Viswan,
Google and read about the IEEE standard package numeric_std. It supports the
data formats you are talking about.
cheers, Syms.
"Viswan" <viswan_1981@hotmail.com> wrote in message
news:c9cb3993.0406231504.86d66a1@posting.google.com...

hi,

I have a doubt in VHDL. How could I convert a two's complement vector
to an unsigned vector and vice versa. I was designing a divider which
works only for unsigned vectors, where as all the rest of my hardware
deals with 2's complement numbers. So I planned to convert the 2's
complement vector to unsigned and get the result and convert it back
to 2's complement. Are there any other functions in VHDL that do
these kind of conversions? I know there are conversion from integers
to vectors but I doubt whether there are any conversion functions that
perform the above function.

Any other ideas on designing the above divider are also mostly
welcome.

Thanks
Viswan