Does VHDL cares for R, L, C components?

[Vagant]

Hello,

I wonder whether VHDL allows description of R, L, C components (which
stand for resistance, inductance and capacity) in the projects.
Obviosly some digital schematics use R, L, C components for waveform
generation, transformation.
There are also digital resistance chips which are helpful in
programming a resistance which changes in steps.

 

[KJ]

"Vagant" <vladimir.v.korostelev@rambler.ru> wrote in message
news:1192698566.766503.86020@t8g2000prg.googlegroups.com...

Hello,

I wonder whether VHDL allows description of R, L, C components (which
stand for resistance, inductance and capacity) in the projects.
Obviosly some digital schematics use R, L, C components for waveform
generation, transformation.
There are also digital resistance chips which are helpful in
programming a resistance which changes in steps.

If you're looking for a 'digital' type of model (i.e. all I/O signals can be

represented by std_logic type) then yes plain vanilla VHDL can be used to
model anything including resistors, capacitors and inductors, etc.

If you're looking to model true analog type of behaviour then you would
probably better off using Spice but, depending on your needs, VHDL-AMS might
do want you want as well. http://www.eda.org/vhdl-ams/

KJ

 

[Andy]

On Oct 18, 4:09 am, Vagant <vladimir.v.koroste...@rambler.ru> wrote:

Hello,

I wonder whether VHDL allows description of R, L, C components (which
stand for resistance, inductance and capacity) in the projects.
Obviosly some digital schematics use R, L, C components for waveform
generation, transformation.
There are also digital resistance chips which are helpful in
programming a resistance which changes in steps.

Digitally, a capacitor is usually modeled as an open circuit, with
both ports either input or driving 'Z'.

An inductor is usually modeled as a wire (good luck with that), but it
rarely matters if it is an open circuit in a digital simulation.

A resistor is usually modeled as a bidirectional strength reducer ('1'
-> 'H' -> 'Z', etc.) so that pullups/terminators work as expected in
the digital simulation.

Beyond that, there's VHDL-AMS, but that's a whole different ballgame.

Andy