does ModelSim XE III/Starter 6.2g has systemverilog support?

Guest
i managed to use ModelSim XE III/Starter 6.2g which comes with xilinx
webpack to compile systemverilog sources, but get the foillowing error
when tried to simulate the source.

Fatal: Bad library format, library not compiled with XE compiler.

does any one know the reason for this? is it because this version does
not support system verilog simulation?

any help is appreciated.
 
<e2point@yahoo.com> wrote in message
news:1191960034.633729.217560@y42g2000hsy.googlegroups.com...
i managed to use ModelSim XE III/Starter 6.2g which comes with xilinx
webpack to compile systemverilog sources, but get the foillowing error
when tried to simulate the source.

Fatal: Bad library format, library not compiled with XE compiler.

does any one know the reason for this? is it because this version does
not support system verilog simulation?
Modelsim XE 6.2c (Jan 2007) was the last XE release to support Systemverilog
simulation.
I assume this feature is (intentionally) disabled in 6.2g, because there is
no mention of Systemverilog
capability on Xilinx's website. (I.e., it was never officially sanctioned in
the Modelsim XE.)

Likewise, the free Modelsim PE 6.3c Student Edition (at www.model.com) no
longer supports
Systemverilog simulation. (Last version to support it was 6.3p1 Student
Edition May 2007)
As far as I can tell, this was deliberate, though residual Systemverilog
'hooks' remain in the
Student-PE simulator. For example, it will compile a Systemverilog file
with the file-extension '.sv', but
it won't start a testbench which contains any Systemverilog modules (or
toplevel.) In the 'properties'
popup menu for your RTL-source files, the 'Systemverilog' option is no
longer there (just Verilog-1995
and Verilog-2001.)
 
Just went through this my self - here is the response I got from
Xilinx (which supports Modelsim XE):

Hi Thomas,

This is [name deleted] Application Engineer from Xilinx
Technical Support I have your case# 710335.

As you wanted to know,

Does Modelsim XE support System Verilog?

- No ModelSim XE doesn't support System Verilog. ModelSim
XE has only two variants VHDL and Verilog simulators but
not System Verilog. ModelSim XE Verilog has only Verilog
libraries and ModelSim XE VHDL has only VHDL libraries.

As you can see from the error message that it complains
about the libraries which are not available for System
Verilog..

I hope this answers your query if i don't hear back from
you by the end of business today then i shall close this
case.

Thank you for contacting Xilinx Technical Support.

Regards,

[name deleted]
Application Engineer
Xilinx Technical Support..
Now, where can I get a copy of XE 6.2c?

~Tom
 
On Oct 10, 9:40 am, SysTom <tjo...@echelon.com> wrote:
Just went through this my self - here is the response I got fromXilinx(which supports Modelsim XE):



Hi Thomas,

This is [name deleted] Application Engineer fromXilinx
Technical Support I have your case# 710335.

As you wanted to know,

Does Modelsim XE support System Verilog?

- No ModelSim XE doesn't support System Verilog. ModelSim
XE has only two variants VHDL and Verilog simulators but
not System Verilog. ModelSim XE Verilog has only Verilog
libraries and ModelSim XE VHDL has only VHDL libraries.

As you can see from the error message that it complains
about the libraries which are not available for System
Verilog..

I hope this answers your query if i don't hear back from
you by the end of business today then i shall close this
case.

Thank you for contactingXilinxTechnical Support.

Regards,

[name deleted]
Application Engineer
XilinxTechnical Support..

Now, where can I get a copy of XE 6.2c?

~Tom
Hi Tom,

I think "Systemv User" has very clearly explained the issue. Modelsim
XE is a Xilinx product that we OEM from MentorGraphics. While it is OK
to compile the system verilog constructs as they have in their example
design there is not much more you can do with the system verilog
support. If Systemverilog for testbenches is your target, then you
really should look into QuestaSim. Modelsim XE 6.2c had supported
these libraries, although then it was changed. We are still looking
into if we can get the simple FIFO design to go through in MXE 6.2g,
although it is not going to give you too much. If you want to use
SystemVerilog in its intended power that is for SVA, then you will not
be able to do with the MXE product line.

Thanks
Duth
 

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