Documentation generator for Verilog

E

El Mehdi Taileb

Guest
Hi there!
I would like to know if there are any automatic documentation generators
similar to Doxygen for Verilog.

Many thanks
 
On Jul 26, 3:03 am, El Mehdi Taileb <taileb.me...@gmail.com> wrote:
Hi there!
I would like to know if there are any automatic documentation generators
similar to Doxygen for Verilog.

Many thanks
Click to expand...
Closest that I found is:

http://www.burbleland.com/v2html/v2html.html

I would love Doxygen - more so for SystemVerilog/VMM, anyone?

Ajeetha, CVC
www.noveldv.com
 
El Mehdi Taileb wrote:
Hi there!
I would like to know if there are any automatic documentation generators
similar to Doxygen for Verilog.

Many thanks
Click to expand...
I don't know exactly what you are looking for, but I got a plugin for
Emacs called htmlize-file so I can convert the colorized/fontified
Verilog in my buffer to an HTML file which I can then include in emails
or documentation. -Kevin
 
On Thu, 26 Jul 2007 15:05:14 -0600, Kevin Neilson wrote:

El Mehdi Taileb wrote:
Hi there!
I would like to know if there are any automatic documentation
generators similar to Doxygen for Verilog.

Many thanks

I don't know exactly what you are looking for, but I got a plugin for
Emacs called htmlize-file so I can convert the colorized/fontified
Verilog in my buffer to an HTML file which I can then include in emails
or documentation. -Kevin
Click to expand...
I need a tool that:
1- Analyzes each file of a project to get its interface and comments
2- Analyzes the relation between modules.
3- Builds HTML files where:

1- The source code of each file is syntax highlighted.
2- There are links in each source to other related source (parents and
instantiated modules, functions ...).
3- The comments, interface and so are groupped and nicely formatted to
form a datasheet-like text.

All these functions are available but for other languages like C/C++,
Java and so. The tools for that are: doxygen, javadoc and so. But for HDL
languages Ididn't find any thing really useful.

Mehdi
 
I've occasionally thought about a Doxygen port in the past. However,
this would be hard work, so it's perhaps not surprising that it hasn't
been done. There's minimal documentation, but it seems that it's
pretty much hard-wired for C-like languages. The code goes through a C
preprocessor, then through a single parser for all input languages. It
doesn't look like it would be straightforward to substitute a Verilog
or VHDL parser. The next problem is that the code is GPL'ed (ie. has a
very unfriendly licence; no flames, please), which isn't going to
encourage people to add their own code to it. So, I suspect it'll
never happen.

[I've got no problems with pseudonyms, but perhaps it would be better
to use the same one when posting the same question to multiple groups?
:) ]

Evan
 
On Fri, 27 Jul 2007 09:57:42 +0100, Evan Lavelle wrote:

I've occasionally thought about a Doxygen port in the past. However,
this would be hard work, so it's perhaps not surprising that it hasn't
been done. There's minimal documentation, but it seems that it's pretty
much hard-wired for C-like languages. The code goes through a C
preprocessor, then through a single parser for all input languages. It
doesn't look like it would be straightforward to substitute a Verilog or
VHDL parser. The next problem is that the code is GPL'ed (ie. has a very
unfriendly licence; no flames, please), which isn't going to encourage
people to add their own code to it. So, I suspect it'll never happen.

I'm an open source enthusiast! the problem is that I haven't enough time
Click to expand...
to do it :(

[I've got no problems with pseudonyms, but perhaps it would be better to
use the same one when posting the same question to multiple groups? :) ]

Evan
I didn't cross-post this message to some other newsgroups. and before
Click to expand...
posting I even made a search in newsgroups and on google but I failed to
find some convincing solution :(
The only pseudonyme that I use some times is GaLaKtIkUs :))
 
El Mehdi Taileb wrote:
On Thu, 26 Jul 2007 15:05:14 -0600, Kevin Neilson wrote:

El Mehdi Taileb wrote:
Hi there!
I would like to know if there are any automatic documentation
generators similar to Doxygen for Verilog.

Many thanks
I don't know exactly what you are looking for, but I got a plugin for
Emacs called htmlize-file so I can convert the colorized/fontified
Verilog in my buffer to an HTML file which I can then include in emails
or documentation. -Kevin

I need a tool that:
1- Analyzes each file of a project to get its interface and comments
2- Analyzes the relation between modules.
3- Builds HTML files where:

1- The source code of each file is syntax highlighted.
2- There are links in each source to other related source (parents and
instantiated modules, functions ...).
3- The comments, interface and so are groupped and nicely formatted to
form a datasheet-like text.

All these functions are available but for other languages like C/C++,
Java and so. The tools for that are: doxygen, javadoc and so. But for HDL
languages Ididn't find any thing really useful.

Mehdi
Click to expand...
If that is what you are looking for, the v2html Perl script you
mentioned is probably what you want. I used it in the past to post code
on a website for others to examine. It made it really easy for someone
else to look at the code because the HTML contained links that allowed
the viewer to browse through the hierarchy and see where variables were
assigned. The problem I had with it is that there were a lot things in
my Verilog that v2html couldn't parse, such as some Verilog-2001 syntax,
and once this was encountered it couldn't really finish parsing the
module. I'm not complaining, since it was free, but this limitation
prevented me from using it much. -Kevin
 
On Fri, 27 Jul 2007 12:50:02 -0600, Kevin Neilson wrote:

El Mehdi Taileb wrote:
On Thu, 26 Jul 2007 15:05:14 -0600, Kevin Neilson wrote:

El Mehdi Taileb wrote:
Hi there!
I would like to know if there are any automatic documentation
generators similar to Doxygen for Verilog.

Many thanks
I don't know exactly what you are looking for, but I got a plugin for
Emacs called htmlize-file so I can convert the colorized/fontified
Verilog in my buffer to an HTML file which I can then include in
emails or documentation. -Kevin

I need a tool that:
1- Analyzes each file of a project to get its interface and comments 2-
Analyzes the relation between modules. 3- Builds HTML files where:

1- The source code of each file is syntax highlighted. 2- There are
links in each source to other related source (parents and
instantiated modules, functions ...).
3- The comments, interface and so are groupped and nicely formatted
to
form a datasheet-like text.

All these functions are available but for other languages like C/C++,
Java and so. The tools for that are: doxygen, javadoc and so. But for
HDL languages Ididn't find any thing really useful.

Mehdi

If that is what you are looking for, the v2html Perl script you
mentioned is probably what you want. I used it in the past to post code
on a website for others to examine. It made it really easy for someone
else to look at the code because the HTML contained links that allowed
the viewer to browse through the hierarchy and see where variables were
assigned. The problem I had with it is that there were a lot things in
my Verilog that v2html couldn't parse, such as some Verilog-2001 syntax,
and once this was encountered it couldn't really finish parsing the
module. I'm not complaining, since it was free, but this limitation
prevented me from using it much. -Kevin
Click to expand...
I'm a Verilog2001 user (generate, 2001 port declarations etc etc)
 
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