Divison Operation

[priya]

hi all
i have to implement the following expression in vhdl
ratio=y1/y2
i tried to use mod operation
but it has a constraint that the operand n operator(one of them) must
be constant or of power of 2.
i tried to use an IP core but the latency is high
is thr any way by which i can acheive the result in a single clock
best regards

 

[KJ]

"priya" <kaushik.priyanka@gmail.com> wrote in message
news:1165489741.059125.264240@f1g2000cwa.googlegroups.com...

hi all
i have to implement the following expression in vhdl
ratio=y1/y2
i tried to use mod operation
but it has a constraint that the operand n operator(one of them) must
be constant or of power of 2.
i tried to use an IP core but the latency is high
is thr any way by which i can acheive the result in a single clock
best regards

Try using the somewhat obvious "ratio=y1/y2".

Assuming that this needs to be implemented in a device, then you may not
like the result in terms of the number of logic resources and/or timing
performance but it is correct and will get the job done in the single clock
cycle (actually within a propogation delay). Without more info on the
ranges of 'y1', 'y2' and 'ratio' and estimated clock performance you
probably can't expect much more help from the peanut gallery.

KJ

 

[Ray Andraka]

KJ wrote:

"priya" <kaushik.priyanka@gmail.com> wrote in message
news:1165489741.059125.264240@f1g2000cwa.googlegroups.com...

hi all
i have to implement the following expression in vhdl
ratio=y1/y2
i tried to use mod operation
but it has a constraint that the operand n operator(one of them) must
be constant or of power of 2.
i tried to use an IP core but the latency is high
is thr any way by which i can acheive the result in a single clock
best regards



Try using the somewhat obvious "ratio=y1/y2".

Assuming that this needs to be implemented in a device, then you may not
like the result in terms of the number of logic resources and/or timing
performance but it is correct and will get the job done in the single clock
cycle (actually within a propogation delay). Without more info on the
ranges of 'y1', 'y2' and 'ratio' and estimated clock performance you
probably can't expect much more help from the peanut gallery.

KJ

Is Y2 a constant or from a relatively small set? If so, then use a
look-up containing the reciprocal and a multiplier.

You also didn't say how many bits in Y1 and Y2, nor how fast the clock
has to be. Division is inherently not a fast operation, which means
that in order to get it to single clock, you might be disappointed with
the maximum clock rate or with the amount of memory required to turn it
into a look-up.