Division of an integer by a real number using VHDL

[genlock]

Hi,

Is there a way to divide an integer by a real number(decimal number).

Can we simply use the operator '/' as follows:
eg: a <= 1234/ 1.36;
where we define 'a' as an integer.

Are there any specific libraries to be included for such a VHDL design
file.

If so, should these libraries be included in a particular order?

Thankyou

 

[genlock]

This is not for a testbench.

Its for hardware which has to be implemented on a FPGA.

This division is a part of another code

I am basically trying to divide a 24 bit vector by 1.36.(output result
eventually being a bit vector)

I am first converting this 24 bit vector to an integer.

Was wondering if we can simply use the operator '/' for then dividing
the integer by 1.36.

Does the '/' operator need specific IEEE libraries to be included in
the design file.

If so, is there any particular order?

Thankyou.

 

[dutchgoldtony]

Are you assuming the imput vector is going to be a multiple of 1.36?

 

[Mohammed A khader]

HI Ralf,

Extend this vector by some zeros to the left to have a fractional
part.

Suppose y is the integer variable which can be represented in 8 bit
as <8.0> format, and 1/1.36 = 0.73529 is represented in 16 bits as
<1.15> format. Then under such conditions multiplication can be done
between unsymmetrical formats i.e. format of <8.0> * <1.15> gives
<9.15>. I think there is no need to pad the integer to represent
fractional part. Correct me if I am going wrong.

Thanks a lot.

-- Mohammed A Khader.

 

[Mohammed A khader]

Hi Ralf,

I mean result <= unsigned_signal * unsigned_constant;

but no need to adjust the fixed point as it is needed in addition.
'unsigned_signal' should'nt be of same format as 'unsigned_constant'.

Even in ieee.numeric_std standard, ' * ' fucntion is defined to
handle
unsymetrical input vectors.

For result <= integer_signal * unsigned_constant;

if ' integer_signal' is defined with appropriate range limits then it
is equivalent to the other.

-- Mohammed A Khader.

 

[genlock]

Thankyou everybody,

I think I have got all my questions answered. Am going to try the
methods suggested here and see how it works....

 

[genlock]

Thankyou very much for all the help regarding this topic....

Does anybody have any idea about dithering?

Thanks

 

[genlock]

Yes I am actually truncating a 48 bit value to 24 bits and hence am
losing the last 24 bits information of audio.....

So I would like to do dithering

Thankyou