N
Nevo
Guest
First off, I'm completely new to FPGA's and Verilog. I'm also self-taught,
with no formal education in digital electronics. So if I'm asking a question
with an obvious answer, that's probably why.
I need to implement a divide-by-14 operation in a Xilinx Spartan FPGA. I
thought it would be a simple matter of using the Verilog / operator, but XST
throws an error since it only supports division by powers of 2.
Can someone point me to a tutorial or other resource for helping me
understand how to implement a divide-by-14 in hardware?
Thanks,
-Nevo
with no formal education in digital electronics. So if I'm asking a question
with an obvious answer, that's probably why.
I need to implement a divide-by-14 operation in a Xilinx Spartan FPGA. I
thought it would be a simple matter of using the Verilog / operator, but XST
throws an error since it only supports division by powers of 2.
Can someone point me to a tutorial or other resource for helping me
understand how to implement a divide-by-14 in hardware?
Thanks,
-Nevo