M
merrittr
Guest
I have a itterative fn to aproximate a square root the 8 bit value
root_x = 0 initially and 0111_0000 when the input x is 49 ie
0111_0000 = 7.0 (so for 51 ~ 7.12). When I run the below wrapper
module I always get 0 for
root_x[7:4] and root_x[3:0] since they dont get the correct answer
until as few itterations 150ns latter any Idea how I would sample
these 2 values at 150ns ?
module extra(clk, x,increment,root_x, MSD, LSD, f0,
f1,compute,num,num1);
input [7:0] x;
input clk, compute;
output [10:0] increment;
output [7:0] root_x,num,num1;
reg [7:0] num,num1;
output [6:0] MSD, LSD, f0, f1;
wire [7:0] root_x;
sqrt sq (clk, x, root_x, increment,p1,p2);
always @ *
begin
//p2 = root_x[7:4];
//p1 = root_x[3:0];
if (compute)
begin
num = {4'b000, root_x[7:4]};
case (root_x[3:0])
4'b0000: num1=8'd0;
4'b0001: num1=8'd6;
4'b0010: num1=8'd12;
4'b0011: num1=8'd18;
4'b0100: num1=8'd25;
4'b0101: num1=8'd32;
4'b0110: num1=8'd37;
4'b0111: num1=8'd43;
4'b1000: num1=8'd50;
4'b1001: num1=8'd56;
4'b1010: num1=8'd62;
4'b1011: num1=8'd68;
4'b1100: num1=8'd75;
4'b1101: num1=8'd81;
4'b1110: num1=8'd87;
4'b1111: num1=8'd93;
endcase
end
else
num = x;
end
ss_display SSD (num, MSD, LSD);
ss_display SSD1 (num1, f0, f1);
endmodule
`include "sqrt.v"
`include "ss_display.v"
root_x = 0 initially and 0111_0000 when the input x is 49 ie
0111_0000 = 7.0 (so for 51 ~ 7.12). When I run the below wrapper
module I always get 0 for
root_x[7:4] and root_x[3:0] since they dont get the correct answer
until as few itterations 150ns latter any Idea how I would sample
these 2 values at 150ns ?
module extra(clk, x,increment,root_x, MSD, LSD, f0,
f1,compute,num,num1);
input [7:0] x;
input clk, compute;
output [10:0] increment;
output [7:0] root_x,num,num1;
reg [7:0] num,num1;
output [6:0] MSD, LSD, f0, f1;
wire [7:0] root_x;
sqrt sq (clk, x, root_x, increment,p1,p2);
always @ *
begin
//p2 = root_x[7:4];
//p1 = root_x[3:0];
if (compute)
begin
num = {4'b000, root_x[7:4]};
case (root_x[3:0])
4'b0000: num1=8'd0;
4'b0001: num1=8'd6;
4'b0010: num1=8'd12;
4'b0011: num1=8'd18;
4'b0100: num1=8'd25;
4'b0101: num1=8'd32;
4'b0110: num1=8'd37;
4'b0111: num1=8'd43;
4'b1000: num1=8'd50;
4'b1001: num1=8'd56;
4'b1010: num1=8'd62;
4'b1011: num1=8'd68;
4'b1100: num1=8'd75;
4'b1101: num1=8'd81;
4'b1110: num1=8'd87;
4'b1111: num1=8'd93;
endcase
end
else
num = x;
end
ss_display SSD (num, MSD, LSD);
ss_display SSD1 (num1, f0, f1);
endmodule
`include "sqrt.v"
`include "ss_display.v"