Display current into pin of symbol...

[R Wilcock]

Hi all, - its been a while, hope everyone is ok.

I have a question:

If I make a symbol of a lower level schematic, I never seem to be able to
plot the current going into the symbol pin. I have to decend into the lower
schematic and figure it out from there. How is this possible? Do I need a
callback in the CDF maybe?

Cheers,

Reuben

 

[Andrew Beckett]

Reuben,

If this is a normal hierarchical block, you shouldn't have to do anything
special in the CDF. It should just ask to save the current through that
terminal.

You don't have a termMapping in the CDF for that cell do you? You probably
shouldn't...

Andrew.

On Thu, 29 Apr 2004 14:58:17 +0100, "R Wilcock" <reubenwilcock@hotmail.com>
wrote:

Hi all, - its been a while, hope everyone is ok.

I have a question:

If I make a symbol of a lower level schematic, I never seem to be able to
plot the current going into the symbol pin. I have to decend into the lower
schematic and figure it out from there. How is this possible? Do I need a
callback in the CDF maybe?

Cheers,

Reuben

--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd

 

[R Wilcock]

Ok I just realised what I was doing wrong. I just needed to select the
subcircuit probe level in the spectre outputs->save all menu. Should have
figured that one out by myself really!

I have another problem you may be able to help with: I have just upgraded to
a new design kit and am using Cadence 4.4.6 and when running a PSS and PAC
analysis (which I have done many times before with the old setup) the
simulator seems to try and run the PAC before the PSS, which results in the
PAC never being run (it has to run after the PSS). However, if I run the
equivalent ocean script from this setup it works fine. Strange.

Any ideas?

Cheers,

Reuben


"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:qbgd905gd732cbrnhv12jturjocj75jq0a@4ax.com...

Reuben,

If this is a normal hierarchical block, you shouldn't have to do anything
special in the CDF. It should just ask to save the current through that
terminal.

You don't have a termMapping in the CDF for that cell do you? You probably
shouldn't...

Andrew.

On Thu, 29 Apr 2004 14:58:17 +0100, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Hi all, - its been a while, hope everyone is ok.

I have a question:

If I make a symbol of a lower level schematic, I never seem to be able to
plot the current going into the symbol pin. I have to decend into the
lower
schematic and figure it out from there. How is this possible? Do I need a
callback in the CDF maybe?

Cheers,

Reuben


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd

 

[tritue truong]

There are a option in spectre in which you can specify which simulation
should run first.
The option is AnalysisOrder in the environement option.
ttt
"R Wilcock" <reubenwilcock@hotmail.com> wrote in message
news:4097825a@news.ecs.soton.ac.uk...

Ok I just realised what I was doing wrong. I just needed to select the
subcircuit probe level in the spectre outputs->save all menu. Should have
figured that one out by myself really!

I have another problem you may be able to help with: I have just upgraded
to
a new design kit and am using Cadence 4.4.6 and when running a PSS and PAC
analysis (which I have done many times before with the old setup) the
simulator seems to try and run the PAC before the PSS, which results in
the
PAC never being run (it has to run after the PSS). However, if I run the
equivalent ocean script from this setup it works fine. Strange.

Any ideas?

Cheers,

Reuben


"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:qbgd905gd732cbrnhv12jturjocj75jq0a@4ax.com...
Reuben,

If this is a normal hierarchical block, you shouldn't have to do
anything
special in the CDF. It should just ask to save the current through that
terminal.

You don't have a termMapping in the CDF for that cell do you? You
probably
shouldn't...

Andrew.

On Thu, 29 Apr 2004 14:58:17 +0100, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Hi all, - its been a while, hope everyone is ok.

I have a question:

If I make a symbol of a lower level schematic, I never seem to be able
to
plot the current going into the symbol pin. I have to decend into the
lower
schematic and figure it out from there. How is this possible? Do I need
a
callback in the CDF maybe?

Cheers,

Reuben


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd