Digital PLL

[bittor]

Hi,
I want to do a digital PLL with a Spartan 3 400 FPGA. How can I do this?
Anyone ona has made something similar?
Thanks

 

[krby_xtrm]

You can use DCM, more info about this on: Xilinx manual: "Using DCM in
Spartan-3 FPGA"

regards,
krby_xtrm

 

[bittor]

Thanks but I need with programable input frecuency not with fixed frecuency

 

[Emil Blaschek]

Please give some more information what you need
CDR or freqency synthesis


"bittor" <bittorfg@nospam.es> wrote in message
news:485763f35ce3d4498771ba4cd9f25d0d@localhost.talkaboutprogramming.com...

Hi,
I want to do a digital PLL with a Spartan 3 400 FPGA. How can I do this?
Anyone ona has made something similar?
Thanks

 

On Thursday, 11 April 2002 13:53:01 UTC+5:30, Roberto Capobianco wrote:

Hi all, could you suggest me some methods to realize a digital PLL in VHDL different from that used in USB (www.usb.org/developers/data/siewp.pdf). In particular is possible to avoid ripple clock ?--Roberto Capobianco Consorzio RFX - CNR di PadovaC.so Stati Uniti, 435127 - Camin (PD) email: capobianco@igi.pd.cnr.itweb: www.igi.pd.cnr.it tel.: +39-049-8295048fax: +39-049-8700718

dear sir ,
i am trying to design dpll using vhdl could you please suggest me some book or refrence papers on any thing


thanks
regards
Rupesh Raghatate
asst prof AVBIT,pawnar ,INDIA