Different Audio Design

[Watson A.Name - \"Watt Su]

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.



--
@@F@r@o@m@@O@r@a@n@g@e@@C@o@u@n@t@y@,@@C@a@l@,@@w@h@e@r@e@@
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goes directly to the trash unless you add NOSPAM in the
Subject: line with other stuff. alondra101 <at> hotmail.com
Don't be ripped off by the big book dealers. Go to the URL
that will give you a choice and save you money(up to half).
http://www.everybookstore.com You'll be glad you did!
Just when you thought you had all this figured out, the gov't
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[Robert Baer]

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at

1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

 

[Watson A.Name - \"Watt Su]

"Rich Grise" <rich@example.net> wrote in message
newsan.2004.11.17.08.34.05.295174@example.net...

On Wed, 17 Nov 2004 00:18:38 -0800, Watson A.Name - "Watt Sun, the
Dark Remover" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output
transistor because there's no forward bias, then the V drop
'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop
gain
increases to the open loop gain. So it would seem that the amp
would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Hey, Watson.

I'm going to level with you, I'm not an expert, I just play one on the
internet. But it looks to me like the gain of the output stage -
you're
talking about the one with an opamp per each output tranny, right? -
is
strapped such that the opamp's loop gain predominates, and I would not
be
a bit surprised to see the circuit behave just as you describe
(emitter
followers are notoriously fast), with two caveats: The slew rate of
the
opamps, and something about a pole or a zero in the complex impedance
at
that horrendous huge output cap.

But that's just a butt-level[0] feeling, so take it for what it's
worth, and let any uselessness go.

Cheers!
Rich

[0] i.e., seat-of-the pants driving by a bench tech. ;-)

One never sees this configuration used in comm'l designs, so I figure
there must be a reason, such as problems with stability. I would do a
few things, like put fuses in the emitters of the power output
transistors.

 

[Watson A.Name - \"Watt Su]

"Robert Baer" <robertbaer@earthlink.net> wrote in message
news:419B1FE6.3C4E456B@earthlink.net...

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output
transistor because there's no forward bias, then the V drop
'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop
gain
increases to the open loop gain. So it would seem that the amp
would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming
zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp
C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive
Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D
will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp
with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.

 

[Rich Grise]

On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the Dark

"Robert Baer" <robertbaer@earthlink.net> wrote in message
....
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.
^^^^

Is this an adverb, or an interjection? ;-)

Thanks,
Rich

 

[Pig Bladder]

On Wed, 17 Nov 2004 08:54:54 -0500, Arny Krueger wrote:
....

Do you know what a 741 is from the standpoint of quality audio?
Anathema!

Gesundheit!
--
The Pig Bladder From Uranus, still waiting for some hot babe to ask
me what my favorite planet is.

 

[John Larkin]

On 17 Nov 2004 11:37:27 -0800, jmeyer@nektonresearch.com (Jim Meyer)
wrote:

"Watson A.Name - \"Watt Sun, the Dark Remover\"" <NOSPAM@dslextreme.com> wrote in message news:<10pm2aoeda3eqc0@corp.supernews.com>...
Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?


I just simulated the circuit in LTSpice using LT1113's instead of
the TL084. It simulates quite nicely. The feedback causes the base
drives to swing through the "crossover" region so that's no problem.

OK, now crank in some dc offset voltages on the opamps. There are four
cases.

John

 

[Andrzej Popowski]

Wed, 17 Nov 2004 05:42:37 -0800, "Watson A.Name - \"Watt Sun, the Dark
Remover\"" <NOSPAM@dslextreme.com> wrote:

Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.

It will not work.
Please analyse only output stage: IC C+D and output transistors.

Imagine, that you disconnect input pin 10 on C from pin 12 and 7. Now
compute bias current thru Q1, Q2 as a function of voltage between pin
10 and 12. You will see, that gain of this stage is near infinity, any
positive voltage between 10 and 12 will shortcircuit Q1 and Q2.

Now reconnect your circuit and think about bias current as a function
of input voltage offset of D and C. How long will it work?


--
Pozdrowienia

Andrzej Popowski

 

[Frank Bemelman]

"Watson A.Name - "Watt Sun, the Dark Remover"" <NOSPAM@dslextreme.com>
schreef in bericht news:10pmla7jmgqn0ca@corp.supernews.com...

"Robert Baer" <robertbaer@earthlink.net> wrote in message
news:419B1FE6.3C4E456B@earthlink.net...
"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output
transistor because there's no forward bias, then the V drop
'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop
gain
increases to the open loop gain. So it would seem that the amp
would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming
zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp
C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive
Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D
will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp
with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.

If the offsets of C & D have the 'right' polarity, it will work.
But if that is not the case... both transistors will be full on.

So you need a couple of TL084's and find a 'good' one.

--
Thanks, Frank.
(remove 'x' and 'invalid' when replying by email)

 

[Dave Platt]

In article <i7mnp0dhvls80vbl2bvkpe5tmp30s8lo1v@4ax.com>,
John Larkin <jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote:

We're taking a flawed design, and adding band-aids on top of band-aids. You
can make a perfectly good amplifier with one opamp and two push-pull emitter
followers biased with a couple of diodes, similar to the first design
sketched in the OP's link. If that design draws too much idle current,
increase the emitter resistor. There's lots of stuff you can do to improve
that design without resorting to the demented design being proposed.


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.

Seems like a reasonable idea, *if* you do the feedback loops right.

In your case, I'd guess that you have a unity- or small-gain feedback
loop wrapped around each individual opamp-and-transistor (tapping off
between the transistor source and the ballast resistor?), and then an
outer feedback loop from the final output back to an earlier stage (a
pre-driver op amp which then feeds the driver op amps?). As long as
these loops are speed-compensated properly, this would probably be
quite safe... some local feedback and some global feedback.

The problemms come up when you have multiple op amps and feedback
loops in parallel in a way which allows them to fight, or have
"wrapped" feedback loops with inappropriate time constants.

--
Dave Platt <dplatt@radagast.org> AE6EO
Hosting the Jade Warrior home page: http://www.radagast.org/jade-warrior
I do _not_ wish to receive unsolicited commercial email, and I will
boycott any company which has the gall to send me such ads!

 

[Phil Allison]

"John Larkin"

It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.

** What fets are P ch, 300 watts and 400 volts ??

Is a bank loan needed to pay for them ??




.................. Phil

 

[John Larkin]

On Thu, 18 Nov 2004 11:27:45 +1100, "Phil Allison"
<philallison@tpg.com.au> wrote:

"John Larkin"


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.



** What fets are P ch, 300 watts and 400 volts ??

Is a bank loan needed to pay for them ??




................. Phil

IXTH11P50, 500 volts, 300 watts. My stock report shows $7.55 each,
which is likely 100+ pricing. Nice part, very rugged.

John

 

[Phil Allison]

"John Larkin"

"Phil Allison"

** What fets are P ch, 300 watts and 400 volts ??

Is a bank loan needed to pay for them ??



IXTH11P50, 500 volts, 300 watts. My stock report shows $7.55 each,
which is likely 100+ pricing. Nice part, very rugged.

John

** Thanks.




............. Phil

 

[Karl Uppiano]

"John Larkin" <jjlarkin@highSNIPlandTHIStechPLEASEnology.com> wrote in
message news:i7mnp0dhvls80vbl2bvkpe5tmp30s8lo1v@4ax.com...

On Wed, 17 Nov 2004 22:49:08 GMT, "Karl Uppiano"
karl.uppiano@verizon.net> wrote:

We're taking a flawed design, and adding band-aids on top of band-aids.
You
can make a perfectly good amplifier with one opamp and two push-pull
emitter
followers biased with a couple of diodes, similar to the first design
sketched in the OP's link. If that design draws too much idle current,
increase the emitter resistor. There's lots of stuff you can do to improve
that design without resorting to the demented design being proposed.


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.

John

I'm not saying it can't be done, but for the application at hand (a low
power amp running on a single supply) it seems simpler is better.

 

[Watson A.Name - \"Watt Su]

"Arny Krueger" <arnyk@hotpop.com> wrote in message
news:C5mdneYGxNIXxQbcRVn-1A@comcast.com...

"Watson A.Name - "Watt Sun, the Dark Remover"" <NOSPAM@dslextreme.com
wrote in message news:10pm2aoeda3eqc0@corp.supernews.com

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output transistor because there's no forward bias, then the V drop
'resistance' of the E-B junction adds to the 100k feedback resistor,
so the loop gain increases to the open loop gain. So it would seem
that the amp would attempt to hunt in this region, possibly
oscillating?

Depends on the op amp. I stopped taking this circuit page seriously
when I
saw "741" on the upper two circuit diagrams.

The guy's a HAM, cut him a little slack, OK?

Do you know what a 741 is from the standpoint of quality audio?
Anathema!

If you keep the gain down to 10 or less, it's almost Hi-Fi. ;-)

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

It's a variation on what some designers call "current dumping".

However let's say the truth - this is an outdated, amateurish design
with no
known merits over established technology.

Well, didn't I say that I didn't think much of it? This guy _is_ an
amateur, AKA HAM. Also, if you investigate this guy's web pages, you'll
find he's enormously prolific, with gobs of schematics of circuits he's
built. In the true spirit of experimentation, you'll notice.

And you don't see this particular type of design in copmmercial
equipment, as I said. Which leads me to believe there are some inherent
disadvantages. I'm asking for insight into what these might be, not
destruictive criticism.

I have a number of schematics of audio power amps that I think have some
disadvantages which I wouldn't use. One is that the design connects one
terminal of the speaker to the Vcc, and lets DC thru the speaker bias
the output stage. This gives the same effect as bootstrapping. But it
also makes the speaker hot relative to ground, which isn't a problem if
the amp and speaker are in the same enclosure and isolated. So I would
consider this unacceptable, and use the bootstrapping method instead.

 

[Watson A.Name - \"Watt Su]

"Rich Grise" <rich@example.net> wrote in message
newsan.2004.11.17.16.43.28.553634@example.net...

On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the
Dark

"Robert Baer" <robertbaer@earthlink.net> wrote in message
...
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.
^^^^

Is this an adverb, or an interjection? ;-)

Sorry for the confloosion. It's an adverb. "It works well," he said,
with low 'torsion' [distortion]. Hey, give him a break, he has also
learned German, and 'Engrish' seems to be his 3rd language(!) Once you
learn German, there's no more room for Engrish in your head! :-[

Thanks,
Rich

 

[Watson A.Name - \"Watt Su]

"Dave Platt" <dplatt@radagast.org> wrote in message
news:10pn91m843gsf25@corp.supernews.com...

In article <pan.2004.11.17.08.34.05.295174@example.net>,
Rich Grise <rich@example.net> wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output
transistor because there's no forward bias, then the V drop
'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop
gain
increases to the open loop gain. So it would seem that the amp
would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Hey, Watson.

I'm going to level with you, I'm not an expert, I just play one on
the
internet. But it looks to me like the gain of the output stage -
you're
talking about the one with an opamp per each output tranny, right? -
is
strapped such that the opamp's loop gain predominates, and I would
not be
a bit surprised to see the circuit behave just as you describe
(emitter
followers are notoriously fast), with two caveats: The slew rate of
the
opamps, and something about a pole or a zero in the complex impedance
at
that horrendous huge output cap.

I'm not an expert either, but I have a Bad Feeling about this design.
It seems to me that it assumes the existence of theoretically-perfect
components with ideal matching (between IC2 and IC2, and between the
various Tr1 and Tr2 parallel transistors).

I'd be very concerned about the effect of any input offset voltage
difference which might exist between IC2 and IC3. It looks to me as
if the two op amps could end up "fighting" one another pretty badly.
If the input offset voltages are offset from one another in one
direction, the bias in the output transistors would probably tend down
towards zero, and distortion might result. If the offsets are in the
opposite direction, (e.g. if IC2 wanted to see a slightly more
positive voltage on its inverting input than IC1 did, for a given
noninverting input voltage) then the op amp output voltages would
diverge in opposite directions, turning both Tr1 and Tr2 quite hard,
and quite possibly driving them out of their safe operating areas.

I think you need to get a handle on that "safe operating area", I think
it's not used in that context.

Add to this the fact that the design doesn't include base resistors
for the transistors, or emitter ballast resistors for the paralleled
Tr1 and Tr2 transistor clusters, and I think you've got a recipe for
serious instability (oscillatory and thermal) and for the emission of
copious quantities of Magic Blue Smoke.

Well, that's what I tend to be concerned about. Thanks.

--
Dave Platt <dplatt@radagast.org
AE6EO
Hosting the Jade Warrior home page:
http://www.radagast.org/jade-warrior
I do _not_ wish to receive unsolicited commercial email, and I will
boycott any company which has the gall to send me such ads!

 

[Watson A.Name - \"Watt Su]

"Jim Meyer" <jmeyer@nektonresearch.com> wrote in message
news:21ede509.0411171137.7e8f5b33@posting.google.com...

"Watson A.Name - \"Watt Sun, the Dark Remover\""
NOSPAM@dslextreme.com> wrote in message

news:<10pm2aoeda3eqc0@corp.supernews.com>...

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output
transistor because there's no forward bias, then the V drop
'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop
gain
increases to the open loop gain. So it would seem that the amp
would
attempt to hunt in this region, possibly oscillating?


I just simulated the circuit in LTSpice using LT1113's instead of
the TL084. It simulates quite nicely. The feedback causes the base
drives to swing through the "crossover" region so that's no problem.

Here's a "cut-n-paste" ASCII file for the input to LTSpice:

Thanks for the sim. [snip]

Swing thru rather quickly I would guess. And doing so with the
possibility of overcorrecting? Or hunting about trying to find a place
it can never find? Or having two opamps, the phase shift might be too
great at high freqs. Or..

 

[Watson A.Name - \"Watt Su]

"Andrzej Popowski" <popej@friko.onet.pl> wrote in message
news:sqcnp0p8rabjdft63ij31g87s4fft652fr@4ax.com...

Wed, 17 Nov 2004 05:42:37 -0800, "Watson A.Name - \"Watt Sun, the Dark
Remover\"" <NOSPAM@dslextreme.com> wrote:
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.

It will not work.
Please analyse only output stage: IC C+D and output transistors.

Imagine, that you disconnect input pin 10 on C from pin 12 and 7. Now
compute bias current thru Q1, Q2 as a function of voltage between pin
10 and 12. You will see, that gain of this stage is near infinity, any
positive voltage between 10 and 12 will shortcircuit Q1 and Q2.

Now reconnect your circuit and think about bias current as a function
of input voltage offset of D and C. How long will it work?

Good question. Thanks.

--
Pozdrowienia

Andrzej Popowski

 

[Rich The Philosophizer]

On Wed, 17 Nov 2004 18:59:57 -0800, Watson A.Name - "Watt Sun, the Dark Remover" wrote:

"Rich Grise" <rich@example.net> wrote in message
newsan.2004.11.17.16.43.28.553634@example.net...
On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the
Dark

"Robert Baer" <robertbaer@earthlink.net> wrote in message
...
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.
^^^^

Is this an adverb, or an interjection? ;-)

Sorry for the confloosion. It's an adverb. "It works well," he said,
with low 'torsion' [distortion]. Hey, give him a break, he has also
learned German, and 'Engrish' seems to be his 3rd language(!) Once you
learn German, there's no more room for Engrish in your head! :-[

Oh, the answer to that one is simple. Just go out of your head! %-}

Cheers!
Rich