Difference in clock generation

[hssig]

Hi,

I have the following clock generators:

always
begin
#(`PERIOD/2) clk = 1'b0;
#(`PERIOD/4) clk = 1'b1;
#(`PERIOD/4) clk = 1'b1;
end

always
begin
#(`PERIOD/2) clk2 = 1'b0;
#(`PERIOD/2) clk2 = 1'b1;
end

Can someone explain to me why the first solution does generate a clock
with 1:3 duty cycle ratio and not as I would expect 1:1 ?

Cheers, hssig