Oct 15, 2003 #1 S Sandhya Guest Hi, Can anybody tell me what is difference between net and reg??when they are supposed to use? thanks
Hi, Can anybody tell me what is difference between net and reg??when they are supposed to use? thanks
Oct 15, 2003 #2 J John_H Guest This is almost as basic as "can someone tell me what is the difference between alpha and numeric??" The information is readily available in the "On-line Verilog HDL Quick Reference Guide" by Stuart Sutherland of Sutherland HDL, Inc. http://www.sutherland-hdl.com Left hand side, "On-line Verilog Ref" Check out section 7.1.1, Register Data Types, and 7.1.2, Net Data Types. Many more of your questions about the syntaxes and construct of the Verilog language are just a mouse-click (or four) away. "Sandhya" <spathak1212@yahoo.co.in> wrote in message news:9b210cbd.0310142309.5403f704@posting.google.com... Hi, Can anybody tell me what is difference between net and reg??when they are supposed to use? thanks Click to expand...
This is almost as basic as "can someone tell me what is the difference between alpha and numeric??" The information is readily available in the "On-line Verilog HDL Quick Reference Guide" by Stuart Sutherland of Sutherland HDL, Inc. http://www.sutherland-hdl.com Left hand side, "On-line Verilog Ref" Check out section 7.1.1, Register Data Types, and 7.1.2, Net Data Types. Many more of your questions about the syntaxes and construct of the Verilog language are just a mouse-click (or four) away. "Sandhya" <spathak1212@yahoo.co.in> wrote in message news:9b210cbd.0310142309.5403f704@posting.google.com... Hi, Can anybody tell me what is difference between net and reg??when they are supposed to use? thanks Click to expand...
