Difference between bus of wires and array of wires

Hi,

What is the difference between using a bus of wires, and an array of
wires, in terms of synthesis (ie such as using Synopsys DC Shell).

Ie:

Bus:
wire [5:0] ctrl_bits;

Array:
wire ctrl_bits [5:0];


Both do the same thing; I think the bus you can assign to all at once,
whereas the array you have to assign individually.

Other than this obvious difference, is there any difference in terms
of synthesis?


Thanks!

 

[Jonathan Bromley]

On Mon, 24 Mar 2008 15:07:02 -0700 (PDT), mosfets@gmail.com wrote:

Bus:
wire [5:0] ctrl_bits;

Array:
wire ctrl_bits [5:0];


I think the bus you can assign to all at once,
whereas the array you have to assign individually.

Yes; the vector ("bus") has a numeric value in the
range 0:63, whereas the array is simply a collection
of six distinct bits.

Other than this obvious difference, is there any difference

Isn't that enough?

You can't have array ports (not in 1364-Verilog, at least)
whereas vector ports are just fine.

As someone else has already asked here recently, what
benefit can you see in the use of a single-dimension
array of bits or wires? Vectors can do much more,
more easily.

SystemVerilog changes the rules somewhat in this
as in other areas.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.