diff between these two assignment

[JoshforRefugee]

folks,
what's the technical difference between this two assignment
wire x,y,z;
reg a;
a = x ? y : z;
wire b;
b = x ? y : z;

 

[John_H]

The technical difference is that you typed an "a" on the one line and a "b"
on the other.

So. What's your question?


"JoshforRefugee" <ankitks@yahoo.com> wrote in message
news:1179953108.454103.215990@p77g2000hsh.googlegroups.com...

folks,
what's the technical difference between this two assignment
wire x,y,z;
reg a;
a = x ? y : z;
wire b;
b = x ? y : z;

 

[John_H]

Sorry for my initial "short" response - your formatting made it hard to see
the difference you were trying to communicate.

The technical difference is that the first assignment isn't allowed in the
given context. If you had an "always @* a=x?y:z;" which would be legal,
there may be subtle differences in the simulation environment but the
synthesized results would be the same.

Registers can be assigned in always blocks, wires can be assigned elsewhere.

Are there further questions you have about the nuance? Or is just the
legality issue enough for the moment?

"JoshforRefugee" <ankitks@yahoo.com> wrote in message
news:1179953108.454103.215990@p77g2000hsh.googlegroups.com...
folks,
what's the technical difference between this two assignment
wire x,y,z;
reg a;
a = x ? y : z;
wire b;
b = x ? y : z;