Determining the level of protection

[Chris Carlen]

Hi:

For a few different categories of interconnection from a PCB containing
inputs and outputs, how much protection from ESD, overvoltage, and
electrical surge should be applied?

Here are my standards:

1. BNC or other physical connection logic/analog signal input from the
external world on something that warrants being called an "instrument"
(not some development board on my bench, but a final product that needs
to impress a customer). This connection will be frequently connected
and disconnected, and is likely to have bare wire adapters attached by
the ordinary user while taking no ESD precautions.

This should have the maximum protection. Inputs should have a resistor
sized for acceptable balance between input bandwidth and current
limiting during ESD events and overvoltage application, dual diodes to
the rails for primary ESD shunting away from the device, and another
resistor between that diode and the device. The power rails need shunt
protection from slower transients via a TVS and DC overvoltage
protection via a zener or SCR crowbar.

Input network should be modeled with an RLC pulse source with component
values and initial voltage conforming to the IEC 1000-4-2 ESD models,
and verified that the protection and protected devices do not have their
ratings exceeded. Actual testing should be performed as well.


2. Multi-pin connectors such as D-sub and others that are intended to
connect some other sensor or instrument to the "instrument", and that
will not be changed frequently.

This one's a little more difficult. It might be very costly and take a
lot of board area to put the full suite of protections on every pin in
this case.

What I commonly see for these situations, is a single RC network. I
wonder if the designers of these RC networks are certain that they can
actually protect against standard ESD models? In my recollection from
my recent SPICE experiments with ESD protection networks, RC networks
just tended to shuffle charge from the external capacitor to the
internal one, and causing the (presumed) protection diodes in the device
to be protected to bear an excessively large surge current.

Thus, this protection usually can't meet the tougher 8kV and 15kV
contact and HBM ESD models. In fact, I am not certain it is really
intended to protect against ESD at all, but rather intended just to
provide some noise filtering.

So perhaps most designers forgo thorough ESD protection on these
multi-pin connectors, assuming that since they are not to be changed
frequently, that there is little change of ESD damage occurring here?

Is this a wise practice on robust instrumentation?


3. Connections from one board to another inside a chassis, assuming
that reasonable protections are in place on each of the boards.

Here I think it is acceptible to provide no protections.


4. Outputs from devices such as op-amps (analog) and logic chips (logic
levels).

I rarely see ESD protections applied to these. Though I have tended to
apply some protections to these as well. I have put SMD 0.2A fuses, to
a pair of diodes to the rails. Then a resistor between my diodes and
the device output pin. That way if there is an overvoltage applied, at
least just the fuse blows instead of the whole output device.



Your input is of interest.


Good day!





--
_______________________________________________________________________
Christopher R. Carlen
Principal Laser/Optical Technologist
Sandia National Laboratories CA USA
crcarleRemoveThis@BOGUSsandia.gov
NOTE, delete texts: "RemoveThis" and "BOGUS" from email address to reply.

 

[night soil dalits]

"Chris Carlen" <crcarleRemoveThis@BOGUSsandia.gov> wrote in message
news:ddgcrb02ao3@news4.newsguy.com...

Hi:

For a few different categories of interconnection from a PCB containing
inputs and outputs, how much protection from ESD, overvoltage, and
electrical surge should be applied?

Here are my standards:

1. BNC or other physical connection logic/analog signal input from the
external world on something that warrants being called an "instrument"
(not some development board on my bench, but a final product that needs
to impress a customer). This connection will be frequently connected
and disconnected, and is likely to have bare wire adapters attached by
the ordinary user while taking no ESD precautions.

This should have the maximum protection. Inputs should have a resistor
sized for acceptable balance between input bandwidth and current
limiting during ESD events and overvoltage application, dual diodes to
the rails for primary ESD shunting away from the device, and another
resistor between that diode and the device. The power rails need shunt
protection from slower transients via a TVS and DC overvoltage
protection via a zener or SCR crowbar.

Input network should be modeled with an RLC pulse source with component
values and initial voltage conforming to the IEC 1000-4-2 ESD models,
and verified that the protection and protected devices do not have their
ratings exceeded. Actual testing should be performed as well.


2. Multi-pin connectors such as D-sub and others that are intended to
connect some other sensor or instrument to the "instrument", and that
will not be changed frequently.

This one's a little more difficult. It might be very costly and take a
lot of board area to put the full suite of protections on every pin in
this case.

What I commonly see for these situations, is a single RC network. I
wonder if the designers of these RC networks are certain that they can
actually protect against standard ESD models? In my recollection from
my recent SPICE experiments with ESD protection networks, RC networks
just tended to shuffle charge from the external capacitor to the
internal one, and causing the (presumed) protection diodes in the device
to be protected to bear an excessively large surge current.

Thus, this protection usually can't meet the tougher 8kV and 15kV
contact and HBM ESD models. In fact, I am not certain it is really
intended to protect against ESD at all, but rather intended just to
provide some noise filtering.

So perhaps most designers forgo thorough ESD protection on these
multi-pin connectors, assuming that since they are not to be changed
frequently, that there is little change of ESD damage occurring here?

Is this a wise practice on robust instrumentation?


3. Connections from one board to another inside a chassis, assuming
that reasonable protections are in place on each of the boards.

Here I think it is acceptible to provide no protections.


4. Outputs from devices such as op-amps (analog) and logic chips (logic
levels).

I rarely see ESD protections applied to these. Though I have tended to
apply some protections to these as well. I have put SMD 0.2A fuses, to
a pair of diodes to the rails. Then a resistor between my diodes and
the device output pin. That way if there is an overvoltage applied, at
least just the fuse blows instead of the whole output device.

Never put fuses in. They fail, and someone has to open the box, pull out the
board and replace them. There are other non destructive ways.
Also you need a definitive spec to design to, a Mil spec etc. They give
specific tests to do. With numbers.
In Denver, you can easily get a 20K volt charge built up by static
electricity and zap any touchable part.

 

[Terry Given]

Chris Carlen wrote:

Hi:

For a few different categories of interconnection from a PCB containing
inputs and outputs, how much protection from ESD, overvoltage, and
electrical surge should be applied?

its often a tradeoff between reliability and cost, usually requiring a
detailed Total-Cost-of-Ownership calculation.

Here are my standards:

1. BNC or other physical connection logic/analog signal input from the
external world on something that warrants being called an "instrument"
(not some development board on my bench, but a final product that needs
to impress a customer). This connection will be frequently connected
and disconnected, and is likely to have bare wire adapters attached by
the ordinary user while taking no ESD precautions.

This should have the maximum protection. Inputs should have a resistor
sized for acceptable balance between input bandwidth and current
limiting during ESD events and overvoltage application, dual diodes to
the rails for primary ESD shunting away from the device, and another
resistor between that diode and the device. The power rails need shunt
protection from slower transients via a TVS and DC overvoltage
protection via a zener or SCR crowbar.

yep.

IMO SCR crowbars are of very limited use. They came about because a
common failure mode of series-pass regulators was to go short, dropping
full unregulated volts across the load, which was generally highly
destructive. Uncommon nowadays, as SMPS dont tend to fail that way
(although some do eg buck). Plus of course they only do something once
the product has died. I'll be impressed if you can make one clamp a
transient.

there are plenty of nice little SMT "L" filters (muRata etc) that have
an input L and a feedthru-type C, which can feed your clamping array.
Some of these are dirt cheap too.

Input network should be modeled with an RLC pulse source with component
values and initial voltage conforming to the IEC 1000-4-2 ESD models,
and verified that the protection and protected devices do not have their
ratings exceeded. Actual testing should be performed as well.

yeah, coupling clamps, ESD guns, the full monty. I have a far more
brutal test, involving bypassing the coupling clamp, and directly
frazzling inputs, outputs etc. with a showering arc generator (sch
posted to abse a week or two ago). If you can pass that, you'll piss in
at the testing lab.

Mind you, it was a bit scary discovering weaknesses that way - slap it
on the output of a (competitors) VFD, and *BANG* !! Fun at 1kW,
downright scary at 1MW. But its a great feeling when the DUT doesnt skip
a beat as you spark-erode your name across the output terminals.

2. Multi-pin connectors such as D-sub and others that are intended to
connect some other sensor or instrument to the "instrument", and that
will not be changed frequently.

This one's a little more difficult. It might be very costly and take a
lot of board area to put the full suite of protections on every pin in
this case.

how much does it cost when the unit croaks? customers *hate* that.

What I commonly see for these situations, is a single RC network. I
wonder if the designers of these RC networks are certain that they can
actually protect against standard ESD models? In my recollection from
my recent SPICE experiments with ESD protection networks, RC networks
just tended to shuffle charge from the external capacitor to the
internal one, and causing the (presumed) protection diodes in the device
to be protected to bear an excessively large surge current.

Thus, this protection usually can't meet the tougher 8kV and 15kV
contact and HBM ESD models. In fact, I am not certain it is really
intended to protect against ESD at all, but rather intended just to
provide some noise filtering.

that'd be my guess. Or it is just an ineffective design - there are
plenty of those around. Especially when it comes to EMC, ESD etc.

There are a number of mfgs that make n-tuples of clamping arrays etc.
for exactly this purpose. And ferrite slabs with holes that the leads of
the D-connectors pass thru etc. muRata is a good start.

So perhaps most designers forgo thorough ESD protection on these
multi-pin connectors, assuming that since they are not to be changed
frequently, that there is little change of ESD damage occurring here?

most manufacturers also produce cheap shit. Because consumers cant see
past the here-and-now and love low-cost products. Best not to think
about how often they need replacing.

Is this a wise practice on robust instrumentation?

no.

3. Connections from one board to another inside a chassis, assuming
that reasonable protections are in place on each of the boards.

Here I think it is acceptible to provide no protections.

usually. Depends on mfg/assy practices. I did one board where a
particular micro pin went directly to a connector, that turned out to be
a convenient hand-hold. Our first run of 200 pcbs had 3-4 micros with
this pin dead despite some pretty good anti-static measures, so in went
a small cap and a series R. no more died.

4. Outputs from devices such as op-amps (analog) and logic chips (logic
levels).

I rarely see ESD protections applied to these. Though I have tended to
apply some protections to these as well. I have put SMD 0.2A fuses, to
a pair of diodes to the rails. Then a resistor between my diodes and
the device output pin. That way if there is an overvoltage applied, at
least just the fuse blows instead of the whole output device.

its unclear, but I presume these go to the outside world, hence the
over-voltage concern. Fuses are a pain, as its often easy to set up a
fault scenario that wont kill the fuse, but will kill the chip - often
just the right voltage will do it. But if the user might accidentally
connect up mains, fuses are often the cheapest solution (but look at
rupture current rating)

Your input is of interest.


Good day!

Cheers
Terry

 

[Chris Carlen]

Terry Given wrote:

Chris Carlen wrote:
Hi:

For a few different categories of interconnection from a PCB
containing inputs and outputs, how much protection from ESD,
overvoltage, and electrical surge should be applied?

its often a tradeoff between reliability and cost, usually requiring a
detailed Total-Cost-of-Ownership calculation.

How can such a thing be done without making a very large number of
assumptions? Perhaps in product development there are statistical data
sets which allow one to model the failure rates as a function of the
level of protections? Who would do this, the board designer or some
manager with a combination of business and statistical modeling skills?

Here are my standards:

1. BNC or other physical connection logic/analog signal input from
the external world on something that warrants being called an
"instrument" (not some development board on my bench, but a final
product that needs to impress a customer). This connection will be
frequently connected and disconnected, and is likely to have bare wire
adapters attached by the ordinary user while taking no ESD precautions.

This should have the maximum protection. Inputs should have a
resistor sized for acceptable balance between input bandwidth and
current limiting during ESD events and overvoltage application, dual
diodes to the rails for primary ESD shunting away from the device, and
another resistor between that diode and the device. The power rails
need shunt protection from slower transients via a TVS and DC
overvoltage protection via a zener or SCR crowbar.

yep.

IMO SCR crowbars are of very limited use. They came about because a
common failure mode of series-pass regulators was to go short, dropping
full unregulated volts across the load, which was generally highly
destructive. Uncommon nowadays, as SMPS dont tend to fail that way
(although some do eg buck). Plus of course they only do something once
the product has died. I'll be impressed if you can make one clamp a
transient.

That's why I'm inclined to use a zener for shunting DC overvoltage,
where the TVS hasn't turned on yet and can't be relied upon to clamp
before the device's power supply ratings are exceeded for instance, the
6.8V TVS might not turn on until 7.14V, whereas a 5.6V zener could
absorb the intended fault current of say 0.2A (above which we just let
the resistor smoke) while keeping well below 6.3V, so that the input
holds below 7.0V as well.

We tend to still use a lot of linear supplies because of the lab
environment with lots of low-level analog instruments strewn about the
place, mixed up with all the digital stuff.

there are plenty of nice little SMT "L" filters (muRata etc) that have
an input L and a feedthru-type C, which can feed your clamping array.
Some of these are dirt cheap too.

Hmm, are you saying that it might be wise to isolate the board's power
planes with a LC filter between those and the power connections of the
protection diodes?

Input network should be modeled with an RLC pulse source with
component values and initial voltage conforming to the IEC 1000-4-2
ESD models, and verified that the protection and protected devices do
not have their ratings exceeded. Actual testing should be performed
as well.


yeah, coupling clamps, ESD guns, the full monty. I have a far more
brutal test, involving bypassing the coupling clamp, and directly
frazzling inputs, outputs etc. with a showering arc generator (sch
posted to abse a week or two ago). If you can pass that, you'll piss in
at the testing lab.

What is a "coupling clamp?"

Are you saying that you short the input protections, so that the input
is connected directly to the power supply of the device (or through the
LC filter)?

Mind you, it was a bit scary discovering weaknesses that way - slap it
on the output of a (competitors) VFD, and *BANG* !! Fun at 1kW,
downright scary at 1MW. But its a great feeling when the DUT doesnt skip
a beat as you spark-erode your name across the output terminals.

:-D

2. Multi-pin connectors such as D-sub and others that are intended to
connect some other sensor or instrument to the "instrument", and that
will not be changed frequently.[edit]
What I commonly see for these situations, is a single RC network.[edit]
Thus, this protection usually can't meet the tougher 8kV and 15kV
contact and HBM ESD models. In fact, I am not certain it is really
intended to protect against ESD at all, but rather intended just to
provide some noise filtering

that'd be my guess. Or it is just an ineffective design - there are
plenty of those around. Especially when it comes to EMC, ESD etc.

Ah-ha! I just realized that is why the last board I looked at had the
caps on the outside and the resistors on the inside. I thought "how's
that supposed to work?" thinking about ESD (one of my obsessions, it
seems). Since we never think about EMC regulations in this lab environment.

Like I have said before, I am in an environemnt where I am almost called
to task (not by the customers, who usually appreciate the quality, but
by the software engineer) for spending time to design in ESD, EMC, etc
protections. We have a situation in which a software engineer specifies
hardware, and thinks that "hobby grade" is just fine, since it's just
for a lab, and will never be sold. It is getting me a bit frustrated
since I am the one who has to spend the time redesigning things to
eliminate the crosstalk, to put in the glue logic that they didn't
realize they'd need, etc., etc. If they'd just have let me do it
carefully from the start, then there would have been no problems.

But then the next project comes along and it's the same attitude, "just
hack it together quickly with COTS hardware. It's easy, just connect
the dots"

There are a number of mfgs that make n-tuples of clamping arrays etc.
for exactly this purpose. And ferrite slabs with holes that the leads of
the D-connectors pass thru etc. muRata is a good start.

I will see what they have in the way of clamping arrays. I have some
Littlefuse devices, which are a bit expensive, but nothing to worry
about here where such a small relative cost increase is of little concern.

4. Outputs from devices such as op-amps (analog) and logic chips
(logic levels).

I rarely see ESD protections applied to these. Though I have tended
to apply some protections to these as well. I have put SMD 0.2A
fuses, to a pair of diodes to the rails. Then a resistor between my
diodes and the device output pin. That way if there is an overvoltage
applied, at least just the fuse blows instead of the whole output device.


its unclear, but I presume these go to the outside world, hence the
over-voltage concern. Fuses are a pain, as its often easy to set up a
fault scenario that wont kill the fuse, but will kill the chip - often
just the right voltage will do it.

Yes, I haven't figured out a fool-proof method here. The main
difficulty is the need to preserve the low output impedance, so the
output needs to be almost directly connected to the outside world.

But if the user might accidentally

connect up mains, fuses are often the cheapest solution (but look at
rupture current rating)

Yeah. I think it's a matter of eliminating 90% of the faults in cases
like these.


Thanks for the input.


Good day!


--
_______________________________________________________________________
Christopher R. Carlen
Principal Laser/Optical Technologist
Sandia National Laboratories CA USA
crcarleRemoveThis@BOGUSsandia.gov
NOTE, delete texts: "RemoveThis" and "BOGUS" from email address to reply.

 

[Terry Given]

Chris Carlen wrote:

Terry Given wrote:

Chris Carlen wrote:

Hi:

For a few different categories of interconnection from a PCB
containing inputs and outputs, how much protection from ESD,
overvoltage, and electrical surge should be applied?


its often a tradeoff between reliability and cost, usually requiring a
detailed Total-Cost-of-Ownership calculation.


How can such a thing be done without making a very large number of
assumptions? Perhaps in product development there are statistical data
sets which allow one to model the failure rates as a function of the
level of protections? Who would do this, the board designer or some
manager with a combination of business and statistical modeling skills?

historical data helps a lot here. Often its not too hard to work out
roughly what it costs to rip a unit out of service, return for repair
and re-install. the installation category (wrt transients) will give you
an idea of the likelihood of getting zapped, as will the environment
(dry = static zapped, humid = condensation problems etc).

IMO designers need to do this stuff, in conjunction with marketing. You
know how many you will be making, what the unit and additional parts
cost etc. Marketing can tell you (in theory what the cost to the
customer of a failure is - perhaps 150 workers sit around doing nothing
until it works again, perhaps it makes little or no difference. Mess
with the operation of a dairy factory or steel mill, it'll cost upwards
of $100,000 per hour.

Here are my standards:

1. BNC or other physical connection logic/analog signal input from
the external world on something that warrants being called an
"instrument" (not some development board on my bench, but a final
product that needs to impress a customer). This connection will be
frequently connected and disconnected, and is likely to have bare
wire adapters attached by the ordinary user while taking no ESD
precautions.

This should have the maximum protection. Inputs should have a
resistor sized for acceptable balance between input bandwidth and
current limiting during ESD events and overvoltage application, dual
diodes to the rails for primary ESD shunting away from the device,
and another resistor between that diode and the device. The power
rails need shunt protection from slower transients via a TVS and DC
overvoltage protection via a zener or SCR crowbar.


yep.

IMO SCR crowbars are of very limited use. They came about because a
common failure mode of series-pass regulators was to go short,
dropping full unregulated volts across the load, which was generally
highly destructive. Uncommon nowadays, as SMPS dont tend to fail that
way (although some do eg buck). Plus of course they only do something
once the product has died. I'll be impressed if you can make one clamp
a transient.


That's why I'm inclined to use a zener for shunting DC overvoltage,
where the TVS hasn't turned on yet and can't be relied upon to clamp
before the device's power supply ratings are exceeded for instance, the
6.8V TVS might not turn on until 7.14V, whereas a 5.6V zener could
absorb the intended fault current of say 0.2A (above which we just let
the resistor smoke) while keeping well below 6.3V, so that the input
holds below 7.0V as well.

zeners tend to have much steeper slopes than TVS do. BTW, a 6V8 zener
will have much the same problem as a 6V8 TVS, only worse. why not a 5V6
TVS ?!

But you're on the right track.

We tend to still use a lot of linear supplies because of the lab
environment with lots of low-level analog instruments strewn about the
place, mixed up with all the digital stuff.

fair call. the other problem with lab supplies is the twiddly knobs,
which can get twiddled unfavourably. I have fond memories of a tech
using my test setup to charge his car battery after work one day. Next
morning, I turn it on and stick 14V@10A up the arse of my 5V circuit.
which is why I now always turn all I,V knobs to min before re-starting
circuits.

there are plenty of nice little SMT "L" filters (muRata etc) that have
an input L and a feedthru-type C, which can feed your clamping array.
Some of these are dirt cheap too.


Hmm, are you saying that it might be wise to isolate the board's power
planes with a LC filter between those and the power connections of the
protection diodes?

no, not at all. in place of input R.

The "L's" are really ferrite beads, so tend not to bug signals of
interest, but present a decent Z to fast transients. I've seen (and
done) a number of designs where the input protection is simply a cap and
a pair of clamp diodes, where the cap is as large as it can be without
buggering up normal operation.


That said, I have often done this:

Vcc----[100k]---+-----+-----to +ve clamp diode Cathode]
| |
[C] [Zener]
| |
0V--------------+-----+

which is almost exactly what you suggest. Its a good way to slap a HUGE
cap on an output that otherwise would be unhappy (eg RS485)

Input network should be modeled with an RLC pulse source with
component values and initial voltage conforming to the IEC 1000-4-2
ESD models, and verified that the protection and protected devices do
not have their ratings exceeded. Actual testing should be performed
as well.


yeah, coupling clamps, ESD guns, the full monty. I have a far more
brutal test, involving bypassing the coupling clamp, and directly
frazzling inputs, outputs etc. with a showering arc generator (sch
posted to abse a week or two ago). If you can pass that, you'll piss
in at the testing lab.


What is a "coupling clamp?"

its a device about 1m long. Flat metal plate, about 6" above a ground
plane. Piano hinge on long axis, fixed to a half-width plate, piano
hinge, another half-width plate - a base witha double-hinged lid. The
(grounded) transient generator (Showering Arc Generator) output (usually
N-type coax connector) connects to the coupling clamp. Lift the lid, lay
your cables on the bottom plate, lower the lid. Voila, lots of
capacitive coupling, hence the name. DUT is connected to dummy (or real)
load via these cables. Watch it go bonkers, and maybe even bang if the
protection aint good enough.

I forget the relevant standard....

Are you saying that you short the input protections, so that the input
is connected directly to the power supply of the device (or through the
LC filter)?

Nope, no changes to DUT at all. I attach a wire with a multimeter probe
(IOW insulated so I dont get zapped) to the SAG output. Then I probe
directly to the DUT I/O terminals, making evil little 5mm arcs (hence
the ability to write ones name on the metalwork). much nastier than
using a coupling clamp.

Same idea as DIY EMC testing keeping an extra 3dB below the limit, to
ensure you pass the real (expensive) test first time.

Mind you, it was a bit scary discovering weaknesses that way - slap it
on the output of a (competitors) VFD, and *BANG* !! Fun at 1kW,
downright scary at 1MW. But its a great feeling when the DUT doesnt
skip a beat as you spark-erode your name across the output terminals.


:-D

2. Multi-pin connectors such as D-sub and others that are intended
to connect some other sensor or instrument to the "instrument", and
that will not be changed frequently.[edit]
What I commonly see for these situations, is a single RC network.[edit]
Thus, this protection usually can't meet the tougher 8kV and 15kV
contact and HBM ESD models. In fact, I am not certain it is really
intended to protect against ESD at all, but rather intended just to
provide some noise filtering


that'd be my guess. Or it is just an ineffective design - there are
plenty of those around. Especially when it comes to EMC, ESD etc.


Ah-ha! I just realized that is why the last board I looked at had the
caps on the outside and the resistors on the inside. I thought "how's
that supposed to work?" thinking about ESD (one of my obsessions, it
seems). Since we never think about EMC regulations in this lab
environment.

This is very common. I have learned from bitter experience to always do
these things properly. you might not need to comply with EMC
regulations, but if your doodad flips out and screws up multiple
experiments and/or fails, thats still a bad thing.

A corollary is: always use a proper PCB. My first employer had a little
DIY pcb setup, and we did our own 2-layer non-PTH prototype boards. Hey,
its just a prototype right? wrong. There are enough things to screw up
without wasting a week due to a shitty home-made via, or a solder
bridge. And the economics are easy, I could burn $500 before lunch
looking for a problem, the cost of getting a real PCB made.

Like I have said before, I am in an environemnt where I am almost called
to task (not by the customers, who usually appreciate the quality, but
by the software engineer) for spending time to design in ESD, EMC, etc
protections. We have a situation in which a software engineer specifies
hardware, and thinks that "hobby grade" is just fine, since it's just
for a lab, and will never be sold. It is getting me a bit frustrated
since I am the one who has to spend the time redesigning things to
eliminate the crosstalk, to put in the glue logic that they didn't
realize they'd need, etc., etc. If they'd just have let me do it
carefully from the start, then there would have been no problems.

the phrase "fuck off" is useful in these situations. OTOH you learn a
lot of what not to do, and every design gets better. With a bit of
practice, its just as easy to do it properly.

IMO s/w "engineers" are often the biggest idiots. They very rarely think
about non-ideal operation - eg buffer overflows. These are the guys who
often wont even use parity on RS232, refuse to implement CRCs, pick
bit-oriented protocols (one bit = one command) which are really just
noise sample-and-go-bonkers etc.

And its invariably s/w that is the holdup. Usually because testing is an
afterthought, as is design. Many are little more than over-qualified
typists. Those who immediately start coding are usually the worst.

Ask him how well the s/w works when the hardware dies.

A less-impolite phrase is "which part of NO dont you understand?"

But then the next project comes along and it's the same attitude, "just
hack it together quickly with COTS hardware. It's easy, just connect
the dots"

ya gotta hate that. Beat him with the Principle of Reciprocity - apply
all his arguments re. hardware to software, and watch him rebut the lot.
Then point out what you have done

Or better yet, pull rank. Go higher in the chain of command, with a
cost-benefit analysis.

This is a very common problem. We had a GM like that - as soon as he saw
a motor turn, he reckoned the product was finished and so tried to
produce/sell it. So we learned to leave that step until last, and even
went so far as to disable that aspect of the software....

it often crops up with testers too.

There are a number of mfgs that make n-tuples of clamping arrays etc.
for exactly this purpose. And ferrite slabs with holes that the leads
of the D-connectors pass thru etc. muRata is a good start.


I will see what they have in the way of clamping arrays. I have some
Littlefuse devices, which are a bit expensive, but nothing to worry
about here where such a small relative cost increase is of little concern.

you shouldnt need a fuse for ESD/EMC. Only some dickhead attaching mains
etc.

4. Outputs from devices such as op-amps (analog) and logic chips
(logic levels).

I rarely see ESD protections applied to these. Though I have tended
to apply some protections to these as well. I have put SMD 0.2A
fuses, to a pair of diodes to the rails. Then a resistor between my
diodes and the device output pin. That way if there is an
overvoltage applied, at least just the fuse blows instead of the
whole output device.


its unclear, but I presume these go to the outside world, hence the
over-voltage concern. Fuses are a pain, as its often easy to set up a
fault scenario that wont kill the fuse, but will kill the chip - often
just the right voltage will do it.


Yes, I haven't figured out a fool-proof method here. The main
difficulty is the need to preserve the low output impedance, so the
output needs to be almost directly connected to the outside world.

I did one which was a user +24V supply, that had to cope with 480Vac up
its bum. A stompy TVS and a ceramic fuse (80kA rupture current) was the
cheapest option by far. We didnt make it user-serviceable (why shouldnt
they pay for their stupidity), but it worked well.

But if the user might accidentally

connect up mains, fuses are often the cheapest solution (but look at
rupture current rating)


Yeah. I think it's a matter of eliminating 90% of the faults in cases
like these.


Thanks for the input.

You're welcome.

Good day!

Cheers
Terry

 

[Dave]

Chris Carlen wrote:

Hi:

For a few different categories of interconnection from a PCB containing
inputs and outputs, how much protection from ESD, overvoltage, and
electrical surge should be applied?

Here are my standards:

1. BNC or other physical connection logic/analog signal input from the
external world on something that warrants being called an "instrument"
(not some development board on my bench, but a final product that needs
to impress a customer). This connection will be frequently connected
and disconnected, and is likely to have bare wire adapters attached by
the ordinary user while taking no ESD precautions.

This should have the maximum protection. Inputs should have a resistor
sized for acceptable balance between input bandwidth and current
limiting during ESD events and overvoltage application, dual diodes to
the rails for primary ESD shunting away from the device, and another
resistor between that diode and the device. The power rails need shunt
protection from slower transients via a TVS and DC overvoltage
protection via a zener or SCR crowbar.

Like someone else said, I agree the SCR is a waste of time for ESD
transient.

There are devices called 'transorbs' which might be more appropriate
than zeners.

2. Multi-pin connectors such as D-sub and others that are intended to
connect some other sensor or instrument to the "instrument", and that
will not be changed frequently.

This one's a little more difficult. It might be very costly and take a
lot of board area to put the full suite of protections on every pin in
this case.

Also on the market. You would probably take a different approach with
the GPIB connector on a $100,000 vector network analyser than you would
on the RS232 port on a PC.

3. Connections from one board to another inside a chassis, assuming
that reasonable protections are in place on each of the boards.
Here I think it is acceptible to provide no protections.

From experience, a lot of devices are taken apart without suitable
static precautions. I see it all the time from people who should know
better.

4. Outputs from devices such as op-amps (analog) and logic chips (logic
levels).

I rarely see ESD protections applied to these. Though I have tended to
apply some protections to these as well. I have put SMD 0.2A fuses, to
a pair of diodes to the rails. Then a resistor between my diodes and
the device output pin. That way if there is an overvoltage applied, at
least just the fuse blows instead of the whole output device.

What makes the fuse blow if you put too much on the output of an op-amp?

Your input is of interest.

Think of a project where a medical doctor could use the instrument. Then
loan it to him, and tell him it is delicate. If it can survive a medic,
it can survive anything.

My boss says it is hard to build something a nurse can not break, but
impossible to build something a doctor can not break.

 

[Chris Carlen]

Dave wrote:

This should have the maximum protection. Inputs should have a
resistor sized for acceptable balance between input bandwidth and
current limiting during ESD events and overvoltage application, dual
diodes to the rails for primary ESD shunting away from the device, and
another resistor between that diode and the device. The power rails
need shunt protection from slower transients via a TVS and DC
overvoltage protection via a zener or SCR crowbar.

Like someone else said, I agree the SCR is a waste of time for ESD
transient.

SCR is for overvoltage protection, not ESD.

I rarely see ESD protections applied to these. Though I have tended
to apply some protections to these as well. I have put SMD 0.2A
fuses, to a pair of diodes to the rails. Then a resistor between my
diodes and the device output pin. That way if there is an overvoltage
applied, at least just the fuse blows instead of the whole output device.

What makes the fuse blow if you put too much on the output of an op-amp?

The fuse blows if an external voltage source greater than the power
rails to which the diodes are connected, is applied to the output. It
isn't intended to protect the op-amp from a shorted output.



Good day!


--
_____________________
Christopher R. Carlen
crobc@bogus-remove-me.sbcglobal.net
SuSE 9.1 Linux 2.6.5