P
Praveen
Guest
I have been using the following procedure to detect the edge of an
signal in a clock synchronous process. I might have made some minor
mistakes in the code below..but the concept is to use a temporary
signal to detect the edge..
Signal FlagTmp : std_logic;
...
...
process(Reset,Clock)
begin
if (Reset = '0') then
FlagTmp <= '1' ;
elsif (Rising_edge (Clock)) then
if(Mysignal = '1' and FlagTmp <= '1') then
Output <= '1' ;
FlagTmp <= '0' ;
elsif (Mysignal = '0') then
FlagTmp <= '1' ;
Output <= '0' ;
else
Output <= '0' ;
end if;
end if;
end process;
I am not sure if this is a "grand" way of doing it. Could anyone
suggest a better approach?
Thanks.
signal in a clock synchronous process. I might have made some minor
mistakes in the code below..but the concept is to use a temporary
signal to detect the edge..
Signal FlagTmp : std_logic;
...
...
process(Reset,Clock)
begin
if (Reset = '0') then
FlagTmp <= '1' ;
elsif (Rising_edge (Clock)) then
if(Mysignal = '1' and FlagTmp <= '1') then
Output <= '1' ;
FlagTmp <= '0' ;
elsif (Mysignal = '0') then
FlagTmp <= '1' ;
Output <= '0' ;
else
Output <= '0' ;
end if;
end if;
end process;
I am not sure if this is a "grand" way of doing it. Could anyone
suggest a better approach?
Thanks.