design problem

can any design a digital circuit whose output comes in following
fashion

0000 -> 1000 -> 1100 -> 1110 -> 1111 -> 0000 -> 1111 -> 0111 -> 0011
->0001 -> 0000 -> 1111 -> 0000

plz give the verilog code also, if possible.

 

Can't handle your homework on your own?

Sheesh.

 

[gabor]

ghelbig@lycos.com wrote:

Can't handle your homework on your own?

Sheesh.

Hint... you need more state bits than output bits to do this...

 

gabor wrote:

Hint... you need more state bits than output bits to do this...

In practice, yes, but as a class exercise, no. There's only 12 states.

But that's probably the point; this homework assignment is to make one
think about the options.

(hint #2: the inverse of the function is not unique.)

 

[gabor]

ghelbig@lycos.com wrote:

gabor wrote:

Hint... you need more state bits than output bits to do this...

In practice, yes, but as a class exercise, no. There's only 12 states.

But that's probably the point; this homework assignment is to make one
think about the options.

(hint #2: the inverse of the function is not unique.)

Sorry, I mis-spoke. What I meant was that the state is not
entirely contained in the output bits. So if you used the
output bits as state, additional bits would be required. I'm
guessing there was a prior assignment that built a simple
Johnson counter, which does not require additional state
bits other thatn its outputs.

 

[graeme.cunningham@googlem]

You could code a shift register which injects a 1 if it is empty and
clears the registers if full.
g

On Nov 22, 1:41 pm, "gabor" <g...@alacron.com> wrote:

ghel...@lycos.com wrote:
gabor wrote:

Hint... you need more state bits than output bits to do this...

In practice, yes, but as a class exercise, no. There's only 12 states.

But that's probably the point; this homework assignment is to make one
think about the options.

(hint #2: the inverse of the function is not unique.)Sorry, I mis-spoke. What I meant was that the state is not
entirely contained in the output bits. So if you used the
output bits as state, additional bits would be required. I'm
guessing there was a prior assignment that built a simple
Johnson counter, which does not require additional state
bits other thatn its outputs.