delta-sigma modulator in LT Spice

Guest
Here's a second-order delta-sigma modulator, approximating an ADUM7703
in LT Spice.

I don't think the integration constants (currently 1 us) matter. Gotta
think about that.

The output filter will be of course digital, in an FPGA. I really want
the net frequency response to be about 20 KHz, first order, so we'll
probably use some fast sinc3 filter or something to mash the noise
down, followed by a 1st order IIR filter to get the final rolloff.

https://www.dropbox.com/s/ltyrmck0ubx1awp/P560_D-S_1.jpg?raw=1

Thanx to Win, AoE3, p924 and so.


Version 4
SHEET 1 2236 680
WIRE -160 48 -240 48
WIRE -64 48 -160 48
WIRE 112 48 48 48
WIRE 192 48 112 48
WIRE 336 48 192 48
WIRE 464 48 336 48
WIRE 672 48 592 48
WIRE 736 48 672 48
WIRE 864 48 736 48
WIRE 1168 48 864 48
WIRE 1392 48 1328 48
WIRE 1424 48 1392 48
WIRE 1520 48 1424 48
WIRE 1664 48 1600 48
WIRE 1728 48 1664 48
WIRE 1888 48 1808 48
WIRE 1936 48 1888 48
WIRE 2000 48 1936 48
WIRE 2112 48 2080 48
WIRE 2160 48 2112 48
WIRE 1104 96 1056 96
WIRE 1168 96 1104 96
WIRE -240 112 -240 48
WIRE 48 112 48 48
WIRE 336 112 336 48
WIRE 592 112 592 48
WIRE 864 112 864 48
WIRE 1664 112 1664 48
WIRE 1888 112 1888 48
WIRE 2160 112 2160 48
WIRE -64 128 -64 48
WIRE 0 128 -64 128
WIRE 192 128 192 48
WIRE 464 128 464 48
WIRE 544 128 464 128
WIRE 736 128 736 48
WIRE 1056 128 1056 96
WIRE 0 176 -64 176
WIRE 544 176 464 176
WIRE 1664 224 1664 176
WIRE 1888 224 1888 176
WIRE 2160 224 2160 176
WIRE -240 240 -240 192
WIRE 48 240 48 192
WIRE 192 240 192 192
WIRE 336 240 336 192
WIRE 592 240 592 192
WIRE 736 240 736 192
WIRE 864 240 864 192
WIRE 1056 240 1056 208
WIRE -64 336 -64 176
WIRE 464 336 464 176
WIRE 464 336 -64 336
WIRE 1424 336 1424 48
WIRE 1424 336 464 336
FLAG 48 240 0
FLAG 192 240 0
FLAG 592 240 0
FLAG 736 240 0
FLAG -240 240 0
FLAG 1056 240 0
FLAG 336 240 0
FLAG 864 240 0
FLAG -160 48 IN
FLAG 112 48 Z1
FLAG 672 48 Z2
FLAG 1392 48 OUT
FLAG 1104 96 CLK
FLAG 1888 224 0
FLAG 1936 48 LP1
FLAG 2160 224 0
FLAG 2112 48 LP2
FLAG 1664 224 0
SYMBOL g 48 96 R0
WINDOW 0 53 44 Left 2
WINDOW 3 58 85 Left 2
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL g 592 96 R0
WINDOW 0 56 40 Left 2
WINDOW 3 61 81 Left 2
SYMATTR InstName G2
SYMATTR Value 1
SYMBOL cap 176 128 R0
WINDOW 0 52 12 Left 2
WINDOW 3 53 51 Left 2
SYMATTR InstName C1
SYMATTR Value 1ľ
SYMBOL cap 720 128 R0
WINDOW 0 60 9 Left 2
WINDOW 3 59 48 Left 2
SYMATTR InstName C2
SYMATTR Value 1ľ
SYMBOL voltage -240 96 R0
WINDOW 0 30 122 Left 2
WINDOW 3 -71 208 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0.25 0.25 5K)
SYMBOL Digital\\dflop 1248 0 R0
WINDOW 0 -16 -84 Left 2
WINDOW 3 -191 -37 Left 2
SYMATTR InstName A1
SYMATTR Value Vhigh=1 Vlow=-1 Ref=0 Rout=1u
SYMBOL voltage 1056 112 R0
WINDOW 0 56 73 Left 2
WINDOW 3 28 106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vclk
SYMATTR Value SINE(0 1 20Meg)
SYMBOL res 320 96 R0
WINDOW 0 53 43 Left 2
WINDOW 3 50 79 Left 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 848 96 R0
WINDOW 0 67 38 Left 2
WINDOW 3 56 76 Left 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 1616 32 R90
WINDOW 0 72 53 VBottom 2
WINDOW 3 81 52 VTop 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL cap 1872 112 R0
WINDOW 0 61 42 Left 2
WINDOW 3 53 79 Left 2
SYMATTR InstName C3
SYMATTR Value 22n
SYMBOL res 2096 32 R90
WINDOW 0 80 54 VBottom 2
WINDOW 3 89 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL cap 2144 112 R0
WINDOW 0 -58 48 Left 2
WINDOW 3 -56 80 Left 2
SYMATTR InstName C4
SYMATTR Value 8n
SYMBOL ind 1712 64 R270
WINDOW 0 -51 62 VTop 2
WINDOW 3 -58 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33ľ
SYMBOL cap 1648 112 R0
WINDOW 0 -72 65 Left 2
WINDOW 3 -80 97 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7n
TEXT 648 -88 Left 2 !.tran 0 2m 0 1n uic
TEXT 152 -88 Left 2 ;2nd Order Delta-Sigma Modulator
TEXT 232 -40 Left 2 ;JL Sep 12 2019
TEXT 1992 -16 Left 2 ;20 KHz
TEXT 1728 -16 Left 2 ;200KHz
 
There’s plenty of papers about second order delta sigma converters

I suggest digging into those

I only used it once, first order. We used one to avoid buying a micro with ADC

Cheers

Klaus
 
On Sat, 14 Sep 2019 15:39:00 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:

There’s plenty of papers about second order delta sigma converters

I suggest digging into those
Click to expand...

I did, but I wanted to run a sim and evaluate the quantitative
performance of various receiver filters, and how they might affect my
bigger control loop. My loop would go bonkers with a sinc3 filter
inside.

The papers that I found were pretty abstract. I couldn't find an LT
Spice sim. Maybe mine will show up in a google search and help
somebody.

I only used it once, first order. We used one to avoid buying a micro with ADC
Click to expand...

The ADUM7703 is pretty slick, as a current shunt monitor. It's a 2nd
order modulator, which has serious noise advantages.
 
On Saturday, September 14, 2019 at 7:02:23 PM UTC-4, jla...@highlandsniptechnology.com wrote:
On Sat, 14 Sep 2019 15:39:00 -0700 (PDT), Klaus Kragelund
klauskvik@hotmail.com> wrote:

There’s plenty of papers about second order delta sigma converters

I suggest digging into those

I did, but I wanted to run a sim and evaluate the quantitative
performance of various receiver filters, and how they might affect my
bigger control loop. My loop would go bonkers with a sinc3 filter
inside.

The papers that I found were pretty abstract. I couldn't find an LT
Spice sim. Maybe mine will show up in a google search and help
somebody.
Click to expand...

Maybe spice is not the best way to model digital logic. Try using an HDL to model the design including the fairly trivial analog. I've already indicated I've done something like this with a fairly simple analog circuit. I think the analog portion of the ADC would be fairly simple and you can easily see what is happening with the digital portion of the design. It should run faster than a Spice sim.

--

Rick C.

- Get 2,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209
 
On Sunday, 15 September 2019 01:02:23 UTC+2, jla...@highlandsniptechnology.com wrote:
On Sat, 14 Sep 2019 15:39:00 -0700 (PDT), Klaus Kragelund
klauskvik@hotmail.com> wrote:

There’s plenty of papers about second order delta sigma converters

I suggest digging into those

I did, but I wanted to run a sim and evaluate the quantitative
performance of various receiver filters, and how they might affect my
bigger control loop. My loop would go bonkers with a sinc3 filter
inside.

The papers that I found were pretty abstract. I couldn't find an LT
Spice sim. Maybe mine will show up in a google search and help
somebody.


I only used it once, first order. We used one to avoid buying a micro with ADC

The ADUM7703 is pretty slick, as a current shunt monitor. It's a 2nd
order modulator, which has serious noise advantages.
Click to expand...

THis is a first order LTspice paper:

https://www.researchgate.net/publication/287489711_Design_and_Simulation_of_First_Order_Sigma-Delta_Modulator_Using_LT_spice_Tool

This one goes into much detail, with out an actual model however:

http://cmosedu.com/jbaker/students/theses/Design%20and%20Analysis%20of%20First%20and%20Second%20Order%20K-Delta-1-Sigma%20Modulators%20in%20Multiple%20Fabrication.pdf


Here a discussion about a second order LT spice simulation:

https://forums.parallax.com/discussion/141965/high-precision-propeller-sigma-delta-adc/p2

I spend just a couple of minutes searching, so if you dig deeper more will turn up

Cheers

Klaus
 
jlarkin@highlandsniptechnology.com wrote...
The ADUM7703 is pretty slick, as a current shunt monitor.
Click to expand...

I'm disappointed with its high Vos, 130uV,
which is a significant fraction of its very
limited input range. You'd think they could
add auto-zero, and reduce Vos by 50x or so.


--
Thanks,
- Win
 
On Sun, 15 Sep 2019 00:00:18 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

On Sunday, 15 September 2019 01:02:23 UTC+2, jla...@highlandsniptechnology.com wrote:
On Sat, 14 Sep 2019 15:39:00 -0700 (PDT), Klaus Kragelund
klauskvik@hotmail.com> wrote:

There’s plenty of papers about second order delta sigma converters

I suggest digging into those

I did, but I wanted to run a sim and evaluate the quantitative
performance of various receiver filters, and how they might affect my
bigger control loop. My loop would go bonkers with a sinc3 filter
inside.

The papers that I found were pretty abstract. I couldn't find an LT
Spice sim. Maybe mine will show up in a google search and help
somebody.


I only used it once, first order. We used one to avoid buying a micro with ADC

The ADUM7703 is pretty slick, as a current shunt monitor. It's a 2nd
order modulator, which has serious noise advantages.

THis is a first order LTspice paper:

https://www.researchgate.net/publication/287489711_Design_and_Simulation_of_First_Order_Sigma-Delta_Modulator_Using_LT_spice_Tool

This one goes into much detail, with out an actual model however:

http://cmosedu.com/jbaker/students/theses/Design%20and%20Analysis%20of%20First%20and%20Second%20Order%20K-Delta-1-Sigma%20Modulators%20in%20Multiple%20Fabrication.pdf


Here a discussion about a second order LT spice simulation:

https://forums.parallax.com/discussion/141965/high-precision-propeller-sigma-delta-adc/p2
Click to expand...

The Spice thing there is 1st order, and has giant oscillation
artifacts. What is A1 for?

2nd order pushes the noise spectrum up, where it can be filtered out.
My problem now is to synthesize a digital filter that keeps the noise
down but doesn't freak out my overall control loop.

I spend just a couple of minutes searching, so if you dig deeper more will turn up
Click to expand...

I poked around for a while, then decided to do it myself. That helps
me understand things better anyhow.
 
a very minimal and silly 1st order

Version 4
SHEET 1 1316 680
WIRE 496 -64 64 -64
WIRE -32 112 -96 112
WIRE 64 112 64 16
WIRE 64 112 48 112
WIRE 80 112 64 112
WIRE 192 112 80 112
WIRE -96 128 -96 112
WIRE 192 128 192 112
WIRE 272 128 192 128
WIRE 752 128 432 128
WIRE 912 128 832 128
WIRE 80 144 80 112
WIRE 272 176 208 176
WIRE 496 176 496 -64
WIRE 496 176 448 176
WIRE 912 192 912 128
WIRE 80 240 80 208
WIRE 208 256 208 176
WIRE 912 304 912 256
WIRE -96 384 -96 208
WIRE 208 400 208 336
FLAG -96 384 0
FLAG 272 224 0
FLAG 208 400 0
FLAG 80 240 0
FLAG 912 304 0
SYMBOL voltage -96 112 R0
WINDOW 3 -226 54 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(.5 .4 5000)
SYMATTR InstName V1
SYMBOL Digital\\dflop 352 80 R0
SYMATTR InstName A1
SYMBOL res 64 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 48 -80 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap 96 208 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 208 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(.5 .5 20e6 0 0 0)
SYMBOL res 848 112 R90
WINDOW 0 80 54 VBottom 2
WINDOW 3 89 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL cap 896 192 R0
WINDOW 0 -58 48 Left 2
WINDOW 3 -56 80 Left 2
SYMATTR InstName C3
SYMATTR Value 8n
TEXT -128 488 Left 2 !.tran 100m
RECTANGLE Normal 576 480 144 -128 2
 
On 15 Sep 2019 08:01:47 -0700, Winfield Hill <winfieldhill@yahoo.com>
wrote:

jlarkin@highlandsniptechnology.com wrote...

The ADUM7703 is pretty slick, as a current shunt monitor.

I'm disappointed with its high Vos, 130uV,
which is a significant fraction of its very
limited input range. You'd think they could
add auto-zero, and reduce Vos by 50x or so.
Click to expand...

Fortunately, my system makes AC; it's still the PM alternator
simulator project creeping along. For a DC system, we'd probably
measure the offset somehow, now and then, and subtract it out. Or at
least cal it out once, at test time.

130 uV is a lot of offset these days.
 
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