define vs parameter

A

a2zasics

Guest
Hi all,

I have seen a compile problem with `define. If i define same `define
in two modules, compiler warns me in NCVERILOG that a similar
definition exists, but does not in MODELSIM. Does anyone know , why
this happens, and if there is an issue using `define. Is it better in
some way to use parameters instead of `defines.

Thanks
SP
 
The reason is probably that NCVERILOG compiles all files together (as
one big file) instead of separate compilation of each file in MODELSIM.

Try use define in command line - it should works correctly in both
simulators.

regards,
MK.

"a2zasics" <shardendu@verizon.net> wrote in message
news:1c97c9ba.0309221553.4a838522@posting.google.com...
Hi all,

I have seen a compile problem with `define. If i define same `define
in two modules, compiler warns me in NCVERILOG that a similar
definition exists, but does not in MODELSIM. Does anyone know , why
this happens, and if there is an issue using `define. Is it better in
some way to use parameters instead of `defines.

Thanks
SP
 
I have seen a compile problem with `define. If i define same `define
in two modules, compiler warns me in NCVERILOG that a similar
definition exists, but does not in MODELSIM. Does anyone know , why
this happens, and if there is an issue using `define.
A `define'd directive takes effect from the point where it's defined until
end of the compilation or when it's redefined. Giving warnings about
redefined directives is a good thing as most of time you may not realize you
define the same diretives in multiple files. I normally put all directives
in one global definition file.

Is it better in
some way to use parameters instead of `defines.
Parametes are effective within a module. They are good for parametizable
module desgins. For state machine encodings I would recommend using
parameters.

Jim Wu
jimwu88NOOOSPAM@yahoo.com (remove capital letters)
http://www.geocities.com/jimwu88/chips
 
use `undef directive in the end of files.

It's similar to C files header. isn't it? :)


"a2zasics" <shardendu@verizon.net> wrote in message
news:1c97c9ba.0309221553.4a838522@posting.google.com...
Hi all,

I have seen a compile problem with `define. If i define same `define
in two modules, compiler warns me in NCVERILOG that a similar
definition exists, but does not in MODELSIM. Does anyone know , why
this happens, and if there is an issue using `define. Is it better in
some way to use parameters instead of `defines.

Thanks
SP
 

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