decode this code.

[dipesh.trivedi]

can anybody tell me how this code works,
here XTALI is clock.
and others are some signals.
plsssssssssssssss help me out.

@(posedge XTALI);
@(posedge XTALI);
@(posedge XTALI);
@(posedge XTALI);
#1;
HCSN_d <= 0;
HA_d <= 2'b01;
HD_d <= 8'h00;
HWEN_d <= 0;

 

[Mike Lewis]

"dipesh.trivedi" <dipesh.trivedi@gmail.com> wrote in message
news:1150439252.444001.251620@c74g2000cwc.googlegroups.com...

can anybody tell me how this code works,
here XTALI is clock.
and others are some signals.
plsssssssssssssss help me out.

@(posedge XTALI);
@(posedge XTALI);
@(posedge XTALI);
@(posedge XTALI);
#1;
HCSN_d <= 0;
HA_d <= 2'b01;
HD_d <= 8'h00;
HWEN_d <= 0;

After 4 clocks and 1 time unit .. the subsequent signals get assigned. I'm
assuming this is testbench code.

Mike

 

[dipesh.trivedi]

hey Mike thts right. its a testbench code. n assignment takes place
aftr 4 clock. i got to know this aftr i ran the simulation. thank u
very much friend.


Mike Lewis wrote:

"dipesh.trivedi" <dipesh.trivedi@gmail.com> wrote in message
news:1150439252.444001.251620@c74g2000cwc.googlegroups.com...
can anybody tell me how this code works,
here XTALI is clock.
and others are some signals.
plsssssssssssssss help me out.

@(posedge XTALI);
@(posedge XTALI);
@(posedge XTALI);
@(posedge XTALI);
#1;
HCSN_d <= 0;
HA_d <= 2'b01;
HD_d <= 8'h00;
HWEN_d <= 0;


After 4 clocks and 1 time unit .. the subsequent signals get assigned. I'm
assuming this is testbench code.

Mike