DCM Simulation Error

T

Timothy Campbell

Guest
I am using Modelsim SE 5.8 to simulate cascaded DCMs. I have two DCMs
cascaded, the first with CLKIN running at 10Mhz. I am using the CLK2X of
the first as the CLKIN for the second DCM. The desired output is CLK2X
of the second DCM (I am trying to generate a 40Mhz clock from a 10Mhz
clock). When I simulate, I recieve the following warning:

# ** Warning: Timing Violation Error : Input Clock Period Jitter on
instance * exceeds 0.001 ns Locked CLKIN Period = 0.1 ns Current CLKIN
Period = 0.3 ns
# Time: 675 ns Iteration: 2 Instance: /dcmtest224/xlxi_1037

I cannot get the second DCM to lock as well. Any suggestions would be
most appreciated.

Best Regards,
T. Justin Campbell
 
Timothy,

1) You must hold the cascaded DM in reset until the first DCM has locked

2) The tool is correct, cascading DCM CLK2X is not recommended, as the
jitter out of the first exceeds the specs of the input of the second.

They will work, but the resulting jitter out of the second one is not
pretty (probably close to 400 to 600 ps P-P, which may be alright for
your application).

Oh, and one last item, 10 MHz is too low a frequency to go into a DCM
with (Fin min is > 24 MHz).

Austin
 
I tried simulating two cascaded DCM, also not successful...some postings
said cascading DCMs is no good...

Just my 2cent...

Best Regards,
Kelvin




"Austin Lesea" <austin@xilinx.com> wrote in message
news:c1fupg$l3u1@cliff.xsj.xilinx.com...
Timothy,

1) You must hold the cascaded DM in reset until the first DCM has locked

2) The tool is correct, cascading DCM CLK2X is not recommended, as the
jitter out of the first exceeds the specs of the input of the second.

They will work, but the resulting jitter out of the second one is not
pretty (probably close to 400 to 600 ps P-P, which may be alright for
your application).

Oh, and one last item, 10 MHz is too low a frequency to go into a DCM
with (Fin min is > 24 MHz).

Austin
 
Timothy Campbell wrote:
I am using Modelsim SE 5.8 to simulate cascaded DCMs. I have two DCMs
cascaded, the first with CLKIN running at 10Mhz. I am using the CLK2X of
the first as the CLKIN for the second DCM. The desired output is CLK2X
of the second DCM (I am trying to generate a 40Mhz clock from a 10Mhz
clock). When I simulate, I recieve the following warning:

# ** Warning: Timing Violation Error : Input Clock Period Jitter on
instance * exceeds 0.001 ns Locked CLKIN Period = 0.1 ns Current CLKIN
Period = 0.3 ns
# Time: 675 ns Iteration: 2 Instance: /dcmtest224/xlxi_1037

I cannot get the second DCM to lock as well. Any suggestions would be
most appreciated.

Best Regards,
T. Justin Campbell
If you connect the inverted "lock" output from the first DCM to the
reset input of the second one it will work fine, provided you are
within the frequency range of the DCMs.
---
jakab
 

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