N
Niv
Guest
Is there a way to write out the date & time to a VHDL file?
I can do it by modifying my sim results files with a tcl script, but
is there a direct way within VHDL??
TIA, Niv.
I can do it by modifying my sim results files with a tcl script, but
is there a direct way within VHDL??
TIA, Niv.