DAC implementation via VHDL within a CPLD

A

AlfonsoGarcia

Guest
Hi all,
I am curious about how a implemenation of a digital to Analog converter
could work within a CPLD. From the knowledge I gained in the last few
weeks, a CPLD can be only used for digital communications. The internal
signals are either HIGH or LOW. I saw the following vhdl code:

process (d2a_reg)
variable d2a_int : integer;
variable d2a_real : real;
begin
d2a_int := CONV_INTEGER(d2a_reg);
d2a_real := (real (d2a_int)) / scale;
-- overflow
if (d2a_real > (real (overflow)) ) then
d2a_out <= real (overflow);
else
d2a_out <= d2a_real;
end if;
end process; -- d2a conversion block

But all what it does is, to convert the digital values to a real value.
How can I create an analog voltage dependend signal out of it. I guess I
would need external circuitry around my CPLD for my application.
Any help or explanation about this issue will be very much appreciated.

Alfons
 
Hi Alfonso,

the VHDL code below was most likely part of a testbench or part of a
behavioral model of a chip that contains a DA convertor. Maybe it's a
CPLD that also contains a DA convertor?

Tom


"AlfonsoGarcia" <alfons.eismann@gmx.de> wrote in message news:<0c0d62560ecd777bd113c82fffe415e5@localhost.talkaboutprogramming.com>...
Hi all,
I am curious about how a implemenation of a digital to Analog converter
could work within a CPLD. From the knowledge I gained in the last few
weeks, a CPLD can be only used for digital communications. The internal
signals are either HIGH or LOW. I saw the following vhdl code:

process (d2a_reg)
variable d2a_int : integer;
variable d2a_real : real;
begin
d2a_int := CONV_INTEGER(d2a_reg);
d2a_real := (real (d2a_int)) / scale;
-- overflow
if (d2a_real > (real (overflow)) ) then
d2a_out <= real (overflow);
else
d2a_out <= d2a_real;
end if;
end process; -- d2a conversion block

But all what it does is, to convert the digital values to a real value.
How can I create an analog voltage dependend signal out of it. I guess I
would need external circuitry around my CPLD for my application.
Any help or explanation about this issue will be very much appreciated.

Alfons
Click to expand...
 
AlfonsoGarcia a écrit:
[...]
But all what it does is, to convert the digital values to a real value.
How can I create an analog voltage dependend signal out of it. I guess I
would need external circuitry around my CPLD for my application.
Any help or explanation about this issue will be very much appreciated.
Click to expand...
Hi
Forget about this code, type 'real' is NOT synthesizable.
You can make a very simple DAC with a few resistors and an op amp as
shown here for example: http://www.allaboutcircuits.com/vol_4/chpt_13/3.html

--
____ _ __ ___
| _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le -
| | | | | (_| |_| | Invalid return address: remove the -
|_| |_|_|\__|\___/
 
That's what I mean. I need external circuitry in order to make the DA
converter reality. Only through a CPLD or FPGA it is not possible.
Thanks for the hints and help.
Alfonso
 
"AlfonsoGarcia" <alfons.eismann@gmx.de> wrote:
How can I create an analog voltage dependend signal out of it. I guess I
would need external circuitry around my CPLD for my application.
Any help or explanation about this issue will be very much appreciated.
Click to expand...
Your right, you can't create an useful analog voltage only using
digital outputs. You need at least some resistors outside the
fpga/cpld.
A typical DAC using an fpga consists either of paralell outputs and a
resistor network, or does some PWM filtering with a lowpass.
Of course you could also use a ready DAC-IC and controll it by the
fpga.

bye Thomas
 
You can do a sigma-delta DAC in the CPLD if you run the clock fast
enough. The external components are just a resistor and capacitor in
that case. The shortwave reciever in an FPGA demo posted on my website
uses a sigma-delta converter clocked at 160 MHz to to get a high fidelity
analog audio output (25KHz sample rate going into it). I think xilinx
has an app-note that describes sigma delta converters in detail.

AlfonsoGarcia wrote:

That's what I mean. I need external circuitry in order to make the DA
converter reality. Only through a CPLD or FPGA it is not possible.
Thanks for the hints and help.
Alfonso
Click to expand...
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top