creating a square-wave out of a transition

[Keith]

Hi,

I'm working on a project that will receive an MFM encoded signal from an
external amiga floppy drive and convert the Transitions and No-transitions
to 1's and 0's(or 0's and 1's, it doesn't matter, I can invert at will in
software). The signal is normally high, 5v. No-transition bits are easy to
detect because the signal is a full 5v for the entire duration of the
sampling period. The transition bits are tougher because it drops to 0v,
and then slowly increases across the duration of the bitcell, eventually
reaching 5v.

If you look at www.techtravels.org/oscopeamigafloppy.jpg you'll get a better
idea of what I'm dealing with. Disregard the top trace on each of the four,
look at the bottom trace, which is CH1. Top left pictures shows
transition(slightly chopped off), no transition, transition, no transition,
etc.

The transitions drop straight down to 0v, and stays there for about 390ns,
and then proceeds to ramp up to 5v. Total bitcell width is 2us.

What I need is some sort of component that will keep the signal at 0v for
the entire(or most, or >640ns ) bitcell width. The best I've come up
with is to use a D-flip/flop which does square things up, because anything
less than .3*5=1.5v is seen as a zero, and anything above goes to 5v only.
This works ok, and brings to the total "0v-time" to about 640ns.

Since I have to recover my clock from data, I will be constantly re-syncing
my clock. This is a good thing, but I'm not sure how reliable my method is
going to be. This means that the wider my transition 0v bit is, the less I
have to worry about having a perfect clock. Obviously, with the current
setup, I have to sample in the first third(640/2000) of the cell. Sampling
too early gets me the bit before, and sampling after will give me an
incorrect 5v 1-bit.

Thanks!

Keith

 

[Jamie]

first you should use a schmit trigger or like it
to square up the way.
my self, i would program a pic chip to read and
buffer the stream. use a simply RS-232 protocol
to have it talk to the computer.
the Pic chip can use its internal timer to measure the
time between the one transient to the next and then
let you get this report via the serial output.


Keith wrote:

Hi,

I'm working on a project that will receive an MFM encoded signal from an
external amiga floppy drive and convert the Transitions and No-transitions
to 1's and 0's(or 0's and 1's, it doesn't matter, I can invert at will in
software). The signal is normally high, 5v. No-transition bits are easy to
detect because the signal is a full 5v for the entire duration of the
sampling period. The transition bits are tougher because it drops to 0v,
and then slowly increases across the duration of the bitcell, eventually
reaching 5v.

If you look at www.techtravels.org/oscopeamigafloppy.jpg you'll get a better
idea of what I'm dealing with. Disregard the top trace on each of the four,
look at the bottom trace, which is CH1. Top left pictures shows
transition(slightly chopped off), no transition, transition, no transition,
etc.

The transitions drop straight down to 0v, and stays there for about 390ns,
and then proceeds to ramp up to 5v. Total bitcell width is 2us.

What I need is some sort of component that will keep the signal at 0v for
the entire(or most, or >640ns ) bitcell width. The best I've come up
with is to use a D-flip/flop which does square things up, because anything
less than .3*5=1.5v is seen as a zero, and anything above goes to 5v only.
This works ok, and brings to the total "0v-time" to about 640ns.

Since I have to recover my clock from data, I will be constantly re-syncing
my clock. This is a good thing, but I'm not sure how reliable my method is
going to be. This means that the wider my transition 0v bit is, the less I
have to worry about having a perfect clock. Obviously, with the current
setup, I have to sample in the first third(640/2000) of the cell. Sampling
too early gets me the bit before, and sampling after will give me an
incorrect 5v 1-bit.

Thanks!

Keith

 

[David Harmon]

On Tue, 23 Nov 2004 15:48:33 -0500 in sci.electronics.components, "Keith" <NOkmonSPAM@adelphia.net> wrote,

Can you give me more detail on a schmit trigger, how one gets laid out,
specific components, etc ?

It is actually spelled "Schmitt trigger", which may be why your Google search didn't yield well.

 

[Keith]

Thanks. I've seen the term before without really understanding much about
it. I did find several results with google.

Based on what I've read so far though, I don't yet understand how a Schmitt
Trigger is going to help me. With the way these transitions work, it
appears that it *would* help square out the bottom of a 0-bit, but I'm
afraid it's going to 'eat' the next high 1-bit.

From google, a Schmitt Trigger switches the output negative when the input
passes upward through a positive reference voltage, but it doesn't appear to
switch the state BACK until the input passes through the lower threshold
voltage. I think this would work fine for squaring up a regular sine wave,
but mine is sort of the bottom-half-only of a sawtooth
wave.(www.techtravels.org/oscopeamigafloppy.jpg)

Tell me if I've got this right:

if I'm chugging along at 5v(normal high state), everything is cool, the s.t.
wouldn't do anything
then, my input signal drops to 0, which I'm assuming since it passes through
the lower threshold, would switch the output
then, as my input signal slowly transitions to 5v, given a low pos ref
voltage, switches it again, which is good
BUT, because the next bit is(could be) a 1-bit(pos high), it never passes
through the lower threshold, which means the s.t. ignores the change in
state from a 0 to a 1, UNTIL the next transition to 0.

If my input signal is not regularly oscillating from high to low, can I
still use an S.T. to square it up?

Thanks,

Keith

"David Harmon" <source@netcom.com> wrote in message
news:41ce5eb2.737296906@news.west.earthlink.net...

On Tue, 23 Nov 2004 15:48:33 -0500 in sci.electronics.components, "Keith"
NOkmonSPAM@adelphia.net> wrote,
Can you give me more detail on a schmit trigger, how one gets laid out,
specific components, etc ?

It is actually spelled "Schmitt trigger", which may be why your Google
search didn't yield well.

 

[Keith]

Hi Jamie,

Thanks for the reply.

Can you give me more detail on a schmit trigger, how one gets laid out,
specific components, etc ?

As far as the PIC goes, there are several problems with using a PIC, and
I've already investigated using one. I currently have the ability to
program only 8-pin and 14-pin devices(mostly small 12F and 16F parts.)
Furthermore, the PICs are simply too slow, unless you are talking about the
DSPic..... The main problems are:

1. Data rate is 500kbps(1/2us) Even if I sample once per bitcell, a 20mhz
PIC divided by 4 gives me 5 MIPS, which gives me only 10 single instructions
per bit. 10 instructions is not enough to sample, convert serial to
parallel, add communication to the PC, etc.
2. If you were talking about the USART serial ports, they max out ~300kbps,
too slow.
3. Even if I go to a faster PIC(which require a more expensive programmer),
I'd rather do this in C --- but even in assembly I would only have 20
instructions on a 40-mhz pic.

Someone recommended a much faster 50/75mhz Ubicom SX --- but I don't have
experience with them, don't have a programmer, don't know how much support
there is for them, etc.

I may have the PIC generate the 3 clocks I need, which is 500khz, 125khz,
and a 62.5khz. I would then have to have some reset circuit to sync the
clocks on the PIC to the data. Then I'll have a PIC clock a 74HCT595 to go
to a PC's parallel port.

Thanks,

Keith

"Jamie" <jamie_5_not_valid_after_5_Please@charter.net> wrote in message
news:KwMod.113$vx1.4@fe11.lga...

first you should use a schmit trigger or like it
to square up the way.
my self, i would program a pic chip to read and
buffer the stream. use a simply RS-232 protocol
to have it talk to the computer.
the Pic chip can use its internal timer to measure the
time between the one transient to the next and then
let you get this report via the serial output.


Keith wrote:

Hi,

I'm working on a project that will receive an MFM encoded signal from an
external amiga floppy drive and convert the Transitions and
No-transitions
to 1's and 0's(or 0's and 1's, it doesn't matter, I can invert at will
in
software). The signal is normally high, 5v. No-transition bits are
easy to
detect because the signal is a full 5v for the entire duration of the
sampling period. The transition bits are tougher because it drops to
0v,
and then slowly increases across the duration of the bitcell, eventually
reaching 5v.

If you look at www.techtravels.org/oscopeamigafloppy.jpg you'll get a
better
idea of what I'm dealing with. Disregard the top trace on each of the
four,
look at the bottom trace, which is CH1. Top left pictures shows
transition(slightly chopped off), no transition, transition, no
transition,
etc.

The transitions drop straight down to 0v, and stays there for about
390ns,
and then proceeds to ramp up to 5v. Total bitcell width is 2us.

What I need is some sort of component that will keep the signal at 0v
for
the entire(or most, or >640ns ) bitcell width. The best I've come up
with is to use a D-flip/flop which does square things up, because
anything
less than .3*5=1.5v is seen as a zero, and anything above goes to 5v
only.
This works ok, and brings to the total "0v-time" to about 640ns.

Since I have to recover my clock from data, I will be constantly
re-syncing
my clock. This is a good thing, but I'm not sure how reliable my method
is
going to be. This means that the wider my transition 0v bit is, the
less I
have to worry about having a perfect clock. Obviously, with the current
setup, I have to sample in the first third(640/2000) of the cell.
Sampling
too early gets me the bit before, and sampling after will give me an
incorrect 5v 1-bit.

Thanks!

Keith

 

[Rob]

"Keith" <NOkmonSPAM@adelphia.net> wrote in message news:<pc6dnecokoh6HzncRVn-vQ@giganews.com>...

Based on what I've read so far though, I don't yet understand how a Schmitt
Trigger is going to help me. With the way these transitions work, it
appears that it *would* help square out the bottom of a 0-bit, but I'm
afraid it's going to 'eat' the next high 1-bit.

From google, a Schmitt Trigger switches the output negative when the input
passes upward through a positive reference voltage, but it doesn't appear to
switch the state BACK until the input passes through the lower threshold
voltage. I think this would work fine for squaring up a regular sine wave,
but mine is sort of the bottom-half-only of a sawtooth
wave.(www.techtravels.org/oscopeamigafloppy.jpg)

Tell me if I've got this right:

if I'm chugging along at 5v(normal high state), everything is cool, the s.t.
wouldn't do anything
then, my input signal drops to 0, which I'm assuming since it passes through
the lower threshold, would switch the output
then, as my input signal slowly transitions to 5v, given a low pos ref
voltage, switches it again, which is good
BUT, because the next bit is(could be) a 1-bit(pos high), it never passes
through the lower threshold, which means the s.t. ignores the change in
state from a 0 to a 1, UNTIL the next transition to 0.

If my input signal is not regularly oscillating from high to low, can I
still use an S.T. to square it up?

Thanks,

Keith

Not sure what you are trying to do here.
I'm looking at you scope print-out and I can see a signal with a
negative pulse with a repeat period of 2uS, lengthening occasional to
3uS.
Is this what you are trying to detect?
In other words, you want a circuit to give a logic 1 while the repeat
period is 2uS and a 0 for each time the repeat period is 3uS?

 

[Keith]

Hi Rob,

"Rob" <rrjonasar@lineisp.co.uk> wrote in message
news:b7d6fa28.0411252352.763cd5c8@posting.google.com...

Not sure what you are trying to do here.
I'm looking at you scope print-out and I can see a signal with a
negative pulse with a repeat period of 2uS, lengthening occasional to
3uS.
Is this what you are trying to detect?
In other words, you want a circuit to give a logic 1 while the repeat
period is 2uS and a 0 for each time the repeat period is 3uS?

Thanks for taking a look. No, I'm actually trying to get a logic 1 for no
reversal and a logic 0 for a reversal. Each bit cell is 2us wide(+/-).
Each bit cell has to have either no reversal(so it stays at 5v), or a
reversal (drops to 0v and slowly increases to 5v across the 2us span).

If you look at the upper left hand corner trace, there are (of course) ten
divisions from left to right, each 2us wide. If N = no reversal, and R =
reversal, reading left to right, it would be RNRNRNRNRN. The trace has the
first division chopped off, and has another reversal after the 10th
division. So if 1 = no reversal, and 0 = reversal, then 0101010101 would be
the bit pattern. This gets a little more complicated because this is MFM,
and it still needs decoded, but nevermind that, because I'm just looking for
raw data.

Let's do the lower right hand one too: RNRNNRNRNR. So 0101101010 would be
the bit pattern there.

Here's the problem: the reversal signal is only at 0v for 390ns +/-, so my
clock to sample the reversal directly at the 0v level would have to be
extremely accurate. I need the reversal, ie the transition from 0v to 5v,
to be zero the entire length of the bit cell. This is my goal anyways, I'd
be happy at this point to get it at 0v for 1us. So I basically want to
convert the transition into a square 0-bit, if that makes sense. With a
D-flip flop I've managed to get it to 640ns in the best case, and certainly
my resultant output is square.

Thanks,

Keith

P.S. I might have used the word transition in the past posts, transitions =
reversals.....

 

[Rob]

"Keith" <NOkmonSPAM@adelphia.net> wrote in message news:<MYydnQHu0uXZzDrcRVn-pQ@giganews.com>...

Hi Rob,

Thanks for taking a look. No, I'm actually trying to get a logic 1 for no
reversal and a logic 0 for a reversal. Each bit cell is 2us wide(+/-).
Each bit cell has to have either no reversal(so it stays at 5v), or a
reversal (drops to 0v and slowly increases to 5v across the 2us span).

If you look at the upper left hand corner trace, there are (of course) ten
divisions from left to right, each 2us wide. If N = no reversal, and R =
reversal, reading left to right, it would be RNRNRNRNRN. The trace has the
first division chopped off, and has another reversal after the 10th
division. So if 1 = no reversal, and 0 = reversal, then 0101010101 would be
the bit pattern. This gets a little more complicated because this is MFM,
and it still needs decoded, but nevermind that, because I'm just looking for
raw data.

Let's do the lower right hand one too: RNRNNRNRNR. So 0101101010 would be
the bit pattern there.

Here's the problem: the reversal signal is only at 0v for 390ns +/-, so my
clock to sample the reversal directly at the 0v level would have to be
extremely accurate. I need the reversal, ie the transition from 0v to 5v,
to be zero the entire length of the bit cell. This is my goal anyways, I'd
be happy at this point to get it at 0v for 1us. So I basically want to
convert the transition into a square 0-bit, if that makes sense. With a
D-flip flop I've managed to get it to 640ns in the best case, and certainly
my resultant output is square.

I think I've got it now. Go to the website below to look at what I
think you have in mind. I will add to it as and when I get time.
http://notrocketscience.mysite.wanadoo-members.co.uk/mfmgenerator.htm
Regards
Robert

 

[petrus bitbyter]

"Keith" <NOkmonSPAM@adelphia.net> schreef in bericht
news:MYydnQHu0uXZzDrcRVn-pQ@giganews.com...

Hi Rob,

"Rob" <rrjonasar@lineisp.co.uk> wrote in message
news:b7d6fa28.0411252352.763cd5c8@posting.google.com...
Not sure what you are trying to do here.
I'm looking at you scope print-out and I can see a signal with a
negative pulse with a repeat period of 2uS, lengthening occasional to
3uS.
Is this what you are trying to detect?
In other words, you want a circuit to give a logic 1 while the repeat
period is 2uS and a 0 for each time the repeat period is 3uS?

Thanks for taking a look. No, I'm actually trying to get a logic 1 for no
reversal and a logic 0 for a reversal. Each bit cell is 2us wide(+/-).
Each bit cell has to have either no reversal(so it stays at 5v), or a
reversal (drops to 0v and slowly increases to 5v across the 2us span).

If you look at the upper left hand corner trace, there are (of course) ten
divisions from left to right, each 2us wide. If N = no reversal, and R =
reversal, reading left to right, it would be RNRNRNRNRN. The trace has
the
first division chopped off, and has another reversal after the 10th
division. So if 1 = no reversal, and 0 = reversal, then 0101010101 would
be
the bit pattern. This gets a little more complicated because this is MFM,
and it still needs decoded, but nevermind that, because I'm just looking
for
raw data.

Let's do the lower right hand one too: RNRNNRNRNR. So 0101101010 would
be
the bit pattern there.

Here's the problem: the reversal signal is only at 0v for 390ns +/-, so
my
clock to sample the reversal directly at the 0v level would have to be
extremely accurate. I need the reversal, ie the transition from 0v to 5v,
to be zero the entire length of the bit cell. This is my goal anyways,
I'd
be happy at this point to get it at 0v for 1us. So I basically want to
convert the transition into a square 0-bit, if that makes sense. With a
D-flip flop I've managed to get it to 640ns in the best case, and
certainly
my resultant output is square.

Thanks,

Keith

P.S. I might have used the word transition in the past posts, transitions
=
reversals.....

Keith,

To obtain the result you describe, you only need a monostable multivibrator
like an old 74LS121. Check out the datasheet to find what RC combination
you need to obtain a 1us pulse. Will be something like 1k8 resistor and a
1nF capacitor. Use either A1 or A2 or both as an input and the /Q output
will give the result you want. IMHO the type of encoding you described here
is not MFM. If you receive a long series of ones you see no edges to
synchronise your clock and synchronisation will get lost.

petrus bitbyter



---
Outgoing mail is certified Virus Free.
Checked by AVG anti-virus system (http://www.grisoft.com).
Version: 6.0.799 / Virus Database: 543 - Release Date: 20-11-2004

 

[Keith]

"petrus bitbyter" <p.kralt@reducespamforchello.nl> wrote in message
news:dsQpd.32942$lN.15825@amsnews05.chello.com...

Keith,

To obtain the result you describe, you only need a monostable
multivibrator
like an old 74LS121. Check out the datasheet to find what RC combination
you need to obtain a 1us pulse. Will be something like 1k8 resistor and a
1nF capacitor. Use either A1 or A2 or both as an input and the /Q output
will give the result you want.

Ok. Will check that out, thanks.

IMHO the type of encoding you described here
is not MFM. If you receive a long series of ones you see no edges to
synchronise your clock and synchronisation will get lost.

Well it's definitely MFM. This is output from an amiga floppy drive(which I
sampled myself, personally), which definitely uses MFM encoding. The long
series of ones is actually no problem, because it simply never happens in
MFM encoding. IIRC, the maximum number of ones is just two in a row, so you
will always have an edge every couple bits....

petrus bitbyter

thanks,

Keith

 

[Keith]

Rob,

"Rob" <rrjonasar@lineisp.co.uk> wrote in message
news:b7d6fa28.0411261313.5bbfdab0@posting.google.com...

I think I've got it now. Go to the website below to look at what I
think you have in mind. I will add to it as and when I get time.
http://notrocketscience.mysite.wanadoo-members.co.uk/mfmgenerator.htm
Regards
Robert

Yeah, that is pretty accurate. It just so happens that the traces pictured
there don't include output filtered by the D-flip flop, so the width of the
those 0-bits is actually 390ns, and not 640ns.

The best-case goal would be for the 0-bits to be 2us, but if I could only
get it to 1us, I would take it.

Thanks,

keith

 

[petrus bitbyter]

"Keith" <NOkmonSPAM@adelphia.net> schreef in bericht
news:geSdnUssY8LdOjXcRVn-iw@giganews.com...

"petrus bitbyter" <p.kralt@reducespamforchello.nl> wrote in message
news:dsQpd.32942$lN.15825@amsnews05.chello.com...

Keith,

To obtain the result you describe, you only need a monostable
multivibrator
like an old 74LS121. Check out the datasheet to find what RC combination
you need to obtain a 1us pulse. Will be something like 1k8 resistor and a
1nF capacitor. Use either A1 or A2 or both as an input and the /Q output
will give the result you want.

Ok. Will check that out, thanks.

IMHO the type of encoding you described here
is not MFM. If you receive a long series of ones you see no edges to
synchronise your clock and synchronisation will get lost.

Well it's definitely MFM. This is output from an amiga floppy drive(which
I
sampled myself, personally), which definitely uses MFM encoding. The long
series of ones is actually no problem, because it simply never happens in
MFM encoding. IIRC, the maximum number of ones is just two in a row, so
you
will always have an edge every couple bits....


petrus bitbyter


thanks,

Keith

Keith,

I don't doubt the amiga using MFM but I think your interpretation of the
waveforms is not correct. Have a look at
http://www.electronics.dit.ie/staff/tscarff/DISKS/magnetic_recording.htm
http://www.tpub.com/neets/book23/103b.htm
for instance to learn a bit about MFM. A datasheet of the 765 floppy
controller also describes it.

petrus bitbyter


---
Outgoing mail is certified Virus Free.
Checked by AVG anti-virus system (http://www.grisoft.com).
Version: 6.0.799 / Virus Database: 543 - Release Date: 19-11-2004

 

[Keith]

Hi Petrus,

"petrus bitbyter" <p.kralt@reducespamforchello.nl> wrote in message
news:MX5qd.39123$lN.14509@amsnews05.chello.com...

I don't doubt the amiga using MFM but I think your interpretation of the
waveforms is not correct. Have a look at
http://www.electronics.dit.ie/staff/tscarff/DISKS/magnetic_recording.htm
http://www.tpub.com/neets/book23/103b.htm
for instance to learn a bit about MFM. A datasheet of the 765 floppy
controller also describes it.

Thanks for the links.

You know I'm going to be doing *software* MFM decoding of the raw MFM data,
right ? I looked at those links and they are completely consistent with all
the other documents I've read about MFM. So the raw data arriving via the
hardware will contain exactly twice the number of bits as the actual data.

I'll be taking the either the "TN", "NN", and "NT" states ([or "RN", "NN",
"NR"][or "PN", "NN", "NP"]), depending on which document you are looking at
(transition, reversal, pulse), which get retrieved from the hardware and
doing something like :

if (current set is RN) and (last truedata bit is 0), then truedata = 0
if (current set is NN) and (last truedata bit is 1), then truedata = 0
if (current set is NR) then truedata = 1

As far as treating the transition, reversal, pulse, as a 0(logic low) and a
no transition, no reversal, no pulse as 1(logic high) --- this might be
backwards, but I don't really care. It's easy enough to simply invert the
bits when they come in.

Incidentally, alot of papers show the pulse as being a positive going square
wave, but the amiga implementation is normally high, and drops to 0v and
transitions to 5v as described earlier and as shown on the traces.

I'm going to be sampling each every pulse period(passing this to a PC), and
then combining the result of the two pulse periods into the final data bit
in software on that PC.

If you see some gaping error here, please let me know. I don't claim to be
an expert on MFM, but I've read excerpts from three or four books, and
upwards of about 10 white papers. I don't claim to have any real world
experience with it, so I might be applying what I know incorrectly --- but I
*thought* I had a good handle on this stuff................

Thanks for taking the time to reply.

petrus bitbyter

Keith

 

[Franc Zabkar]

On Tue, 23 Nov 2004 13:49:55 -0500, "Keith" <NOkmonSPAM@adelphia.net>
put finger to keyboard and composed:

I'm working on a project that will receive an MFM encoded signal from an
external amiga floppy drive and convert the Transitions and No-transitions
to 1's and 0's(or 0's and 1's, it doesn't matter, I can invert at will in
software). The signal is normally high, 5v. No-transition bits are easy to
detect because the signal is a full 5v for the entire duration of the
sampling period. The transition bits are tougher because it drops to 0v,
and then slowly increases across the duration of the bitcell, eventually
reaching 5v.

If you look at www.techtravels.org/oscopeamigafloppy.jpg you'll get a better
idea of what I'm dealing with. Disregard the top trace on each of the four,
look at the bottom trace, which is CH1. Top left pictures shows
transition(slightly chopped off), no transition, transition, no transition,
etc.

The transitions drop straight down to 0v, and stays there for about 390ns,
and then proceeds to ramp up to 5v. Total bitcell width is 2us.

What I need is some sort of component that will keep the signal at 0v for
the entire(or most, or >640ns ) bitcell width. The best I've come up
with is to use a D-flip/flop which does square things up, because anything
less than .3*5=1.5v is seen as a zero, and anything above goes to 5v only.
This works ok, and brings to the total "0v-time" to about 640ns.

My old IBM AT Tech Reference manual has circuit diagrams of the old
5.25" FDDs and of the MFM HDD/FDD controller card. The interface ICs
are 7438/7406 open collector drivers and 74LS14 Schmitt triggers. The
interface uses 150 ohm pullup resistors. Maybe your slow rise time is
due to an absence of a suitable pullup resistor???

Since I have to recover my clock from data, I will be constantly re-syncing
my clock. This is a good thing, but I'm not sure how reliable my method is
going to be. This means that the wider my transition 0v bit is, the less I
have to worry about having a perfect clock. Obviously, with the current
setup, I have to sample in the first third(640/2000) of the cell. Sampling
too early gets me the bit before, and sampling after will give me an
incorrect 5v 1-bit.

Thanks!

Keith

- Franc Zabkar
--
Please remove one 's' from my address when replying by email.

 

[Rob]

"Keith" <NOkmonSPAM@adelphia.net> wrote in message news:<OvednXx_7anrNTXcRVn-vQ@giganews.com>...

Rob,

"Rob" <rrjonasar@lineisp.co.uk> wrote in message
news:b7d6fa28.0411261313.5bbfdab0@posting.google.com...
I think I've got it now. Go to the website below to look at what I
think you have in mind. I will add to it as and when I get time.
http://notrocketscience.mysite.wanadoo-members.co.uk/mfmgenerator.htm
Regards
Robert

Yeah, that is pretty accurate. It just so happens that the traces pictured
there don't include output filtered by the D-flip flop, so the width of the
those 0-bits is actually 390ns, and not 640ns.

The best-case goal would be for the 0-bits to be 2us, but if I could only
get it to 1us, I would take it.

Thanks,
So long as the monostable period is less than the shortest repeat

period of your waveform, you should be OK. Probably best to make some
portion of the timing resistor adjustable (500R variable and 1k2
fixed).
This puts me in mind of an 80's computer that my brother had. Had to
be tweeked twice a year to make the HDD work, once in the winter and
again in the summer, to take ambient temperature changes into account.

keith

 

Franc Zabkar wrote:

My old IBM AT Tech Reference manual has circuit diagrams of the old
5.25" FDDs and of the MFM HDD/FDD controller card. The interface ICs
are 7438/7406 open collector drivers and 74LS14 Schmitt triggers. The
interface uses 150 ohm pullup resistors. Maybe your slow rise time is
due to an absence of a suitable pullup resistor???
- Franc Zabkar

Franc,

Thanks for the suggestion. The circuit I am "optimizing" originally
had 1k pullups, and I tried that with no luck. I also tried the 150
ohm just for the heck of it.

Both of them did clean up the "ringing" at the bottom of the wave(the
1k more than the 150) and so it was a considerably more smooth when the
wave drops to 0v, stays there 355ns and then proceeds to transition
back to 5v.

Before I added the resistor, after it dropped to 0v, it jumped up to
~.75v stayed there for 300ns and then transitioned to 5v.

I'll use the 1k pull ups.... and I'm going to try using the 74HC132 to
get a squarewave out of this goofy transition(thanks Rob!!)
Thanks!
Keith