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Hi,
I am aware that the best way to create a seed (for random numbers) is
external hardware, but does anybody know any cheap-and-easy tricks to
generate a random-ish number on an FPGA.
Kristoff
On Thursday, May 4, 2017 at 11:44:54 AM UTC+1, kristoff wrote:
Hi,
I am aware that the best way to create a seed (for random numbers) is
external hardware, but does anybody know any cheap-and-easy tricks to
generate a random-ish number on an FPGA.
Kristoff
Read the LSB of the voltage monitoring in xilinx sysmon to get each bit
of your number.
Colin
On Thu, 04 May 2017 07:03:03 -0700, colin wrote:
On Thursday, May 4, 2017 at 11:44:54 AM UTC+1, kristoff wrote:
Hi,
I am aware that the best way to create a seed (for random numbers) is
external hardware, but does anybody know any cheap-and-easy tricks to
generate a random-ish number on an FPGA.
Kristoff
Read the LSB of the voltage monitoring in xilinx sysmon to get each bit
of your number.
Colin
Or for sufficiently random request timing, keep a clock running and use
the clock value for the seed.
Or combine the two.
I seem to remember doing a web search on this a while back -- there are a
lot of papers, of varying degrees of technical soundness.
In article <u_idnX0HweEx3JbEnZ2dnUU7-IWdnZ2d@giganews.com>,
Tim Wescott <tim@seemywebsite.really> wrote:
On Thu, 04 May 2017 07:03:03 -0700, colin wrote:
On Thursday, May 4, 2017 at 11:44:54 AM UTC+1, kristoff wrote:
Hi,
I am aware that the best way to create a seed (for random numbers) is
external hardware, but does anybody know any cheap-and-easy tricks to
generate a random-ish number on an FPGA.
Kristoff
Read the LSB of the voltage monitoring in xilinx sysmon to get each bit
of your number.
Colin
Or for sufficiently random request timing, keep a clock running and use
the clock value for the seed.
Or combine the two.
I seem to remember doing a web search on this a while back -- there are a
lot of papers, of varying degrees of technical soundness.
Xilinx has many app notes on this - it's a common requests.
Here's one I've read in the past, but there's others:
http://forums.xilinx.com/xlnx/attachments/xlnx/EDK/27322/1/HighSpeedTrueRandomNumberGeneratorsinXilinxFPGAs.pdf
On Thursday, May 4, 2017 at 11:44:54 AM UTC+1, kristoff wrote:
Hi,
I am aware that the best way to create a seed (for random numbers) is
external hardware, but does anybody know any cheap-and-easy tricks to
generate a random-ish number on an FPGA.
Kristoff
Read the LSB of the voltage monitoring in xilinx sysmon to get each bit of your number.
Colin
http://forums.xilinx.com/xlnx/attachments/xlnx/EDK/27322/1/HighSpeedTrueRandomNumberGeneratorsinXilinxFPGAs.pdf
I built a very wide version of this several months ago to do testing in the lab but it hasn't been tested yet. I'll have to report back after my coworkers try it out. You do have to instantiate LUT primitives to get it to synthesize. I don't know why the app note didn't address this nor supply any example HDL.