CPU Model for Co-simulation

A

akineko

Guest
Hello everyone,

I would like to create a scheme to hook up an external CPU model to a
Verilog design.
I have already established a basic communication protocol to link
Verilog design to an external device.
So, it should be easy to link a CPU model to a Verilog design.

I'm looking for a 32-bit CPU model written in C or Java or Python or
any high-level language that can be supported by gcc.
So far, I can think of are SPARC V8 or DLX CPU, which was designed by
Hennessy and Patterson.
As I don't want to spend time to create development environment for
this, I would like to find a CPU which is ready to plug-in.

The goal of my experiment is to create a framework so that any
external model (CPU, DSP, compression engine, and other IPs) can be
easily plugged in to a Verilog design.

Any comments, any suggestions will be greatly appreciated.

Aki Niimura
 
On 13 אוקטובר, 01:11, akineko <akin...@gmail.com> wrote:
Hello everyone,

I would like to create a scheme to hook up an external CPU model to a
Verilog design.
I have already established a basic communication protocol to link
Verilog design to an external device.
So, it should be easy to link a CPU model to a Verilog design.

I'm looking for a 32-bit CPU model written in C or Java or Python or
any high-level language that can be supported by gcc.
So far, I can think of are SPARC V8 or DLX CPU, which was designed by
Hennessy and Patterson.
As I don't want to spend time to create development environment for
this, I would like to find a CPU which is ready to plug-in.

The goal of my experiment is to create a framework so that any
external model (CPU, DSP, compression engine, and other IPs) can be
easily plugged in to a Verilog design.

Any comments, any suggestions will be greatly appreciated.

Aki Niimura
If you have a simulator that supports both VHDL and verilog than you
may use leon. leon 2 is a full soc. I have a few examples in my site:
http://bknpk.no-ip.biz like
http://bknpk.no-ip.biz/leon_i2c_syn/leon_i2c_syn.html
 

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