Converting std_logic_vector to integer

I know there have been so many posts on this topic. But for some reason
my code doesnt work and i dont see anything wrong with it. I read
through most posts and i dont seem to be doing any different from whats
being suggested...

I am using th xilinx webpack.... the code is below.. i get an error
saying that i cannot use operands in TO_INTEGER in this context....
I can figure out whats wrong...

Thanks in advance guys,

Sai
-------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.numeric_std.ALL;

entity integer_app is
Port ( input : in unsigned (2 downto 0);
index: out integer);
end integer_app ;

architecture Behavioral of integer_app is
begin
index <= TO_INTEGER(input);
end Behavioral;

 

Hey,

What's the error that you get?
Is it "Undefined symbol 'TO_INTEGER'"?

If so, try replacing TO_INTEGER with CONV_INTEGER.

Look under Where_you_installed_xilinxISE\Xilinx\vhdl\src\ieee or
Where_you_installed_xilinxISE\Xilinx\verilog\src\ieee to see what are
the available functions that you could see.

Make sure that you include the appropraite library - usinged or signed
or whatever in your source file

eg: use IEEE.STD_LOGIC_UNSIGNED.ALL;

good luck.

-vj



skilambi@gmail.com wrote:

I know there have been so many posts on this topic. But for some reason
my code doesnt work and i dont see anything wrong with it. I read
through most posts and i dont seem to be doing any different from whats
being suggested...

I am using th xilinx webpack.... the code is below.. i get an error
saying that i cannot use operands in TO_INTEGER in this context....
I can figure out whats wrong...

Thanks in advance guys,

Sai
-------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.numeric_std.ALL;

entity integer_app is
Port ( input : in unsigned (2 downto 0);
index: out integer);
end integer_app ;

architecture Behavioral of integer_app is
begin
index <= TO_INTEGER(input);
end Behavioral;

 

[Ralf Hildebrandt]

skilambi@gmail.com wrote:

I am using th xilinx webpack.... the code is below.. i get an error
saying that i cannot use operands in TO_INTEGER in this context....
I can figure out whats wrong...

-------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.numeric_std.ALL;

What the hell...?

Reduce it to
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std.ALL;

Don't use the other two libraries. These are not standard libraries. And
don't use them together with numeric_std.


Ralf

 

[David Binnie]

This works:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;


entity integer_app is
Port ( input : in unsigned (2 downto 0);
index: out integer);
end integer_app ;

architecture Behavioral of integer_app is
begin

index <= CONV_INTEGER(input);

end Behavioral;
<skilambi@gmail.com> wrote in message
news:1146379958.383960.261450@i40g2000cwc.googlegroups.com...

I know there have been so many posts on this topic. But for some reason
my code doesnt work and i dont see anything wrong with it. I read
through most posts and i dont seem to be doing any different from whats
being suggested...

I am using th xilinx webpack.... the code is below.. i get an error
saying that i cannot use operands in TO_INTEGER in this context....
I can figure out whats wrong...

Thanks in advance guys,

Sai
-------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.numeric_std.ALL;

entity integer_app is
Port ( input : in unsigned (2 downto 0);
index: out integer);
end integer_app ;

architecture Behavioral of integer_app is
begin
index <= TO_INTEGER(input);
end Behavioral;