J
Jon Elson
Guest
Hello, all,
I have an old design implemented in the Xilinx 9572, and need to update it.
Using ise 13.4, I created a new project, imported the files, and found it
won't fit in the 9572XL, which was a big surprise. Although the 9572 was
fairly full, the design easily fit there, and I just recompiled it for the
9572, and this version of ise easily fit it.
Does anybody have any suggestions on settings to make it fit in the XL?
The error messages suggest reducing the collapsing input limit or the
product term limit. I did this in the Design goals and Strategies, but at
the end of the fitter report it still shows the default values. Is there a
trick to making it use the modified limits and other options?
Not only does the 95144XL cost a bit more, but it is only available in the
next size up package.
Thanks very much for any help.
Jon
I have an old design implemented in the Xilinx 9572, and need to update it.
Using ise 13.4, I created a new project, imported the files, and found it
won't fit in the 9572XL, which was a big surprise. Although the 9572 was
fairly full, the design easily fit there, and I just recompiled it for the
9572, and this version of ise easily fit it.
Does anybody have any suggestions on settings to make it fit in the XL?
The error messages suggest reducing the collapsing input limit or the
product term limit. I did this in the Design goals and Strategies, but at
the end of the fitter report it still shows the default values. Is there a
trick to making it use the modified limits and other options?
Not only does the 95144XL cost a bit more, but it is only available in the
next size up package.
Thanks very much for any help.
Jon