Convergence error

S

Samiran

Guest
Dear all,

I am simulating (ac simulation) a 2nd order filter sallen-key active-
filter circuit with the opamp model written in cadence ahdlLib to plot
the gain and phase response of the filter circuit. But I am getting an
error:

----------------------------------------------------------------------------------------------
******************************************
AC Analysis `ac': freq = (1 Hz -> 100 MHz)
******************************************

Warning from spectre during DC analysis, during AC analysis `ac'.
Detected NaN at node a18.
Fatal error found by spectre during DC analysis, during AC analysis
`ac'.
Please ensure the node (and the nodes driving it) is not a
floating node.
It should be connected to at least two other nodes.
----------------------------------------------------------------------------------------------
after this error message some suggestions on how to deal with
convergence difficulties are given in spectre.out.


** a18 is the output node.

What is leading to this convergence problem?


Regards
Sam
 
On May 16, 4:29 pm, Samiran <samiran....@gmail.com> wrote:
Dear all,

I am simulating (ac simulation) a 2nd order filter sallen-key active-
filter circuit with the opamp model written in cadence ahdlLib to plot
the gain and phase response of the filter circuit. But I am getting an
error:

----------------------------------------------------------------------------------------------
******************************************
AC Analysis `ac': freq = (1 Hz -> 100 MHz)
******************************************

Warning from spectre during DC analysis, during AC analysis `ac'.
    Detected NaN at node a18.
Fatal error found by spectre during DC analysis, during AC analysis
`ac'.
    Please ensure the node (and the nodes driving it) is not a
floating node.
        It should be connected to at least two other nodes.
----------------------------------------------------------------------------------------------
after this error message some suggestions on how to deal with
convergence difficulties are given in spectre.out.

** a18 is the output node.

What is leading to this convergence problem?

Regards
Sam
Dear Sam,

The error message says it all. Whatever it appears from the Error
message that a18 is a node (prob an output) of your ahdl block and due
to some logical error the voltage or logic value is not proper, and
the simulator finding it as NaN. Hence it appears to simulator that it
is a floating node and hence it asks you to make proper connection. Go
through your ahdl code and find the flaw. Hence, it is unable to
perform the DC or AC analysis.

By the way, how you have written in Cadence ahdlLib? It is a
collection of some ahdl code as it is a Library like analogLib. I
think you hav ewritten in some ahdl.

Thanks and Regards !!!!

Cheerssss !!!!

Debjit.
 
On May 19, 6:14 am, Debjit <debjit...@gmail.com> wrote:
On May 16, 4:29 pm, Samiran <samiran....@gmail.com> wrote:



Dear all,

I am simulating (ac simulation) a 2nd order filter sallen-key active-
filter circuit with the opamp model written in cadence ahdlLib to plot
the gain and phase response of the filter circuit. But I am getting an
error:

----------------------------------------------------------------------------------------------
******************************************
AC Analysis `ac': freq = (1 Hz -> 100 MHz)
******************************************

Warning from spectre during DC analysis, during AC analysis `ac'.
    Detected NaN at node a18.
Fatal error found by spectre during DC analysis, during AC analysis
`ac'.
    Please ensure the node (and the nodes driving it) is not a
floating node.
        It should be connected to at least two other nodes.
----------------------------------------------------------------------------------------------
after this error message some suggestions on how to deal with
convergence difficulties are given in spectre.out.

** a18 is the output node.

What is leading to this convergence problem?

Regards
Sam

Dear Sam,

The error message says it all. Whatever it appears from the Error
message that a18 is a node (prob an output) of your ahdl block and due
to some logical error the voltage or logic value is not proper, and
the simulator finding it as NaN. Hence it appears to simulator that it
is a floating node and hence it asks you to make proper connection. Go
through your ahdl code and find the flaw. Hence, it is unable to
perform the DC or AC analysis.

By the way, how you have written in Cadence ahdlLib? It is a
collection of some ahdl code as it is a Library like analogLib. I
think you hav ewritten in some ahdl.

Thanks and Regards !!!!

Cheerssss !!!!

Debjit.

I have not written in ahdlLib, Just copied the code written there into
mu own library and modified that according to my requirement.
 
Samiran wrote, on 05/19/10 06:32:
I have not written in ahdlLib, Just copied the code written there into
mu own library and modified that according to my requirement.
OK, but if you don't tell us what you've done, it's very hard to debug!

Andrew.
 

Welcome to EDABoard.com

Sponsor

Back
Top