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I've got a simulation testbench with multiple instances of a 6T SRAM
cell and each instance is used to measure one specification. When I
run MC simulations with the mismatch only option, Cadence assigns each
transistor a unique Vt (Vt is the only mismatch variable in this
case). However, I want to simulate mismatch between the 6 transistors
inside the cell, but not between each instance of the 6T cell. I need
6T instances to be identical. I thought of a couple tricks to do this
but neither seemed practical. For example, I can create unique models
for each transistor in the 6T cell and use global process parameters
to model mismatch (This will complicate things while simulating other
circuits). Cadence also lets me define correlations between
transistors but doesn't allow 1.0 correlation. Any suggestions?
Thank you,
Umut Arslan
cell and each instance is used to measure one specification. When I
run MC simulations with the mismatch only option, Cadence assigns each
transistor a unique Vt (Vt is the only mismatch variable in this
case). However, I want to simulate mismatch between the 6 transistors
inside the cell, but not between each instance of the 6T cell. I need
6T instances to be identical. I thought of a couple tricks to do this
but neither seemed practical. For example, I can create unique models
for each transistor in the 6T cell and use global process parameters
to model mismatch (This will complicate things while simulating other
circuits). Cadence also lets me define correlations between
transistors but doesn't allow 1.0 correlation. Any suggestions?
Thank you,
Umut Arslan