Constant Values of 0

[laserbeak43]

Hello,
ISE is giving me a warning:
":Xst:1710 - FF/Latch <RDB_2> (without init value) has a constant
value of 0 in block <init>. This FF/Latch will be trimmed during the
optimization process"

When clicking the warning link the only thing that pops up in the
knowledge base is titled:
"How do I filter messages out of the XST log file?"

So, looking in my init module, I search for instances of RDB which is
a register, 4-bits wide.
it's in an always block's case statement that assigns(non-blocking)
either 4'h2 or 4'h3 to it.
and one blocking assignment outside of the always block that says:
assign dbo = RDB;
dbo is a 4-bit output.

I'm lost and don't understand this warning. I have similar ones in my
code and would like to understand why xst is addressing this, and if
it's even a problem.
Could someone please give me some info?

Thanks,
Malik

 

[glen herrmannsfeldt]

laserbeak43 <laserbeak43@gmail.com> wrote:

ISE is giving me a warning:
":Xst:1710 - FF/Latch <RDB_2> (without init value) has a constant
value of 0 in block <init>. This FF/Latch will be trimmed during the
optimization process"

(snip)

So, looking in my init module, I search for instances of RDB which is
a register, 4-bits wide.
it's in an always block's case statement that assigns(non-blocking)
either 4'h2 or 4'h3 to it.
(snip)

If the only values are 4'h2 and 4'h3 then only one bit ever changes.
By the time of P&R everything is separate bits, so I would
expect the other three bits to be optimized out. Are there
also messages for the other two constant bits?

-- glen

 

[laserbeak43]

Nope!!
So i guess that's correct then! I just wanted an answer from someone
more knowledgeable.
Thanks!!
Malik

On Oct 27, 1:30 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:

laserbeak43 <laserbea...@gmail.com> wrote:
   ISE is giving me a warning:
":Xst:1710 - FF/Latch <RDB_2> (without init value) has a constant
value of 0 in block <init>. This FF/Latch will be trimmed during the
optimization process"

(snip)> So, looking in my init module, I search for instances of RDB which is
a register, 4-bits wide.
it's in an always block's case statement that assigns(non-blocking)
either 4'h2 or 4'h3 to it.

(snip)

If the only values are 4'h2 and 4'h3 then only one bit ever changes.
By the time of P&R everything is separate bits, so I would
expect the other three bits to be optimized out.  Are there
also messages for the other two constant bits?

-- glen

 

[gabor]

On Oct 27, 2:16 pm, laserbeak43 <laserbea...@gmail.com> wrote:

Nope!!
So i guess that's correct then! I just wanted an answer from someone
more knowledgeable.
Thanks!!
Malik

On Oct 27, 1:30 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:

laserbeak43 <laserbea...@gmail.com> wrote:
   ISE is giving me a warning:
":Xst:1710 - FF/Latch <RDB_2> (without init value) has a constant
value of 0 in block <init>. This FF/Latch will be trimmed during the
optimization process"

(snip)> So, looking in my init module, I search for instances of RDB which is
a register, 4-bits wide.
it's in an always block's case statement that assigns(non-blocking)
either 4'h2 or 4'h3 to it.

(snip)

If the only values are 4'h2 and 4'h3 then only one bit ever changes.
By the time of P&R everything is separate bits, so I would
expect the other three bits to be optimized out.  Are there
also messages for the other two constant bits?

-- glen

Are you sure the 4-bit register isn't initialized to 0 first
and then only allowed to be 2 or 3 in the case statement? In
that case only bits that remain 0 (not 1) would never change and
therefore get optimized out. If you have a clocked always
block with no reset function, generally a bad practice, the
default initialization value for the register would be zero
for XST, although a simulator would start it up at 4'bXXXX.

Regards,
Gabor