Considerations for Multiplier Design

[confused soul]

I am trying to build a 16 X 16 bit multiplier using Mentor Graphics. In
the design of this multiplier, for the adder blocks should I go for a
16 bit adders or should it be 8 bit or 4 bit. I am not sure on how to
choose the optimal number of bits for the adder to be used in this
multiplier. Any pointers to this will be helpful.

 

[tlbs]

Here are several different options:

http://www.andraka.com/multipli.htm

A few years ago I made a 12 x 12 using the Carry Save Array method. It
can easily be expanded to 16 bits.

 

[Ken Smith]

In article <1110582109.837383.63650@z14g2000cwz.googlegroups.com>,
confused soul <confused.mind@gmail.com> wrote:

I am trying to build a 16 X 16 bit multiplier using Mentor Graphics. In
the design of this multiplier, for the adder blocks should I go for a
16 bit adders or should it be 8 bit or 4 bit. I am not sure on how to
choose the optimal number of bits for the adder to be used in this
multiplier. Any pointers to this will be helpful.

How fast do you need the results from the multiply?

If you have all day, a 1 bit adder and shift register design uses about
the least silicon.


--
--
kensmith@rahul.net forging knowledge

 

[confused soul]

The carry save blocks were 4 bits, 8 bits or 12 bits?

 

[confused soul]

i am looking for speed in the range of 45-60 ns for clocked multiply
time

 

[Robert Baer]

confused soul wrote:

The carry save blocks were 4 bits, 8 bits or 12 bits?

Use a QSM.