Conflict found between ActiveHDL6.1 and ModelSim SE

J

Jay

Guest
When both of them were installed on my pc, I found:
1.ModelSim can't compile Xilinx library
2.ISE will give a fatal error when ActiveHDL try generate post-PAR timing
simulation model

and they both can work well separately.
 
Have you tried AHDL 6.1 service pack 1?

Though using it with Altera (cos I have to) there are various fixes to bits
and pieces. YMMV

"Jay" <yuhaiwen@hotmail.com> wrote in message
news:bgnoeu$qa34o$1@ID-195883.news.uni-berlin.de...
When both of them were installed on my pc, I found:
1.ModelSim can't compile Xilinx library
2.ISE will give a fatal error when ActiveHDL try generate post-PAR timing
simulation model

and they both can work well separately.
Click to expand...
 
I've installed sp1 of AHDL, the problem still exists.
But I just tried its flow with ISE5.2.
"Paul Baxter" <pauljnospambaxter@hotnospammail.com> Đ´ČëĎűϢĐÂÎĹ
:3f300a06$0$11375$cc9e4d1f@news.dial.pipex.com...
Have you tried AHDL 6.1 service pack 1?

Though using it with Altera (cos I have to) there are various fixes to
bits
and pieces. YMMV

"Jay" <yuhaiwen@hotmail.com> wrote in message
news:bgnoeu$qa34o$1@ID-195883.news.uni-berlin.de...
When both of them were installed on my pc, I found:
1.ModelSim can't compile Xilinx library
2.ISE will give a fatal error when ActiveHDL try generate post-PAR
timing
simulation model

and they both can work well separately.
Click to expand...
 
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